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XMEGAA Datasheet(PDF) 97 Page - ATMEL Corporation

Part # XMEGAA
Description  Interrupts and Programmable Multi-level Interrupt Controller
PDF  445 Pages
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

XMEGAA Datasheet(HTML) 97 Page - ATMEL Corporation

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97
8077H–AVR–12/09
XMEGA A
8.3.4
Standby Mode
Standby mode is identical to Power-down with the exception that the enabled system clock
sources are kept running, while the CPU, Peripheral and RTC clocks are stopped. This reduces
the wake-up time.
8.3.5
Extended Standby Mode
Extended Standby mode is identical to Power-save mode with the exception that the enabled
system clock sources are kept running while the CPU and Peripheral clocks are stopped. This
reduces the wake-up time.
8.4
Power Reduction Registers
The Power Reduction (PR) registers provides a method to stop the clock to individual peripher-
als. When this is done the current state of the peripheral is frozen and the associated I/O
registers cannot be read or written. Resources used by the peripheral will remain occupied;
hence the peripheral should in most cases be disabled before stopping the clock. Enabling the
clock to a peripheral again, puts the peripheral in the same state as before it was stopped. This
can be used in Idle mode and Active mode to reduce the overall power consumption signifi-
cantly. In all other sleep modes, the peripheral clock is already stopped.
Not all devices have all the peripherals associated with a bit in the power reduction registers.
Setting a power reduction bit for a peripheral that is not available will have no effect.
8.5
Register Description – Sleep
8.5.1
CTRL- Sleep Control Register
• Bit 7:4 - Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
• Bit 3:1 - SMODE[2:0]: Sleep Mode Selection
These bits select sleep modes according to Table 8-2 on page 97.
Bit
7654321
0
+0x00
----
SMODE[2:0]
SEN
CTRL
Read/Write
RRRR
R/W
R/W
R/W
R/W
Initial Value
0000000
0
Table 8-2.
Sleep mode
SMODE[2:0]
SEN
Group Configuration
Description
XXX
0
OFF
No sleep mode enabled
000
1
IDLE
Idle Mode
001
1
-
Reserved
010
1
PDOWN
Power-down Mode
011
1
PSAVE
Power-save Mode
100
1
-
Reserved



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