XMEGAA datasheet(3/445 Pages) ATMEL

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8077H–AVR–12/09

XMEGA A

Overview

The XMEGA A is a family of low power, high performance and peripheral rich CMOS 8/16-bit

microcontrollers based on the AVR enhanced RISC architecture. By executing powerful instruc-

tions in a single clock cycle, the XMEGA A achieves throughputs approaching 1 Million

Instructions Per Second (MIPS) per MHz allowing the system designer to optimize power con-

sumption versus processing speed.

The AVR CPU combines a rich instruction set with 32 general purpose working registers. All the

32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent

registers to be accessed in one single instruction, executed in one clock cycle. The resulting

architecture is more code efficient while achieving throughputs many times faster than conven-

tional single-accumulator or CISC based microcontrollers.

The XMEGA A devices provide the following features: In-System Programmable Flash with

Read-While-Write capabilities, Internal EEPROM and SRAM, four-channel DMA Controller,

eight-channel Event System and Programmable Multi-level Interrupt Controller, up to 78 general

purpose I/O lines, 16- or 32-bit Real Time Counter (RTC), up to eight flexible 16-bit Timer/Coun-

ters with compare modes and PWM, up to eight USARTs, up to four I

2C and SMBUS compatible

Two Wire Serial Interfaces (TWIs), up to four Serial Peripheral Interfaces (SPIs), AES and DES

crypto engine, up to two 8-channel, 12-bit ADCs with optional differential input with programma-

ble gain, up to two 2-channel, 12-bit DACs, up to four analog comparators with window mode,

programmable Watchdog Timer with separate Internal Oscillator, accurate internal oscillators

with PLL and prescaler and programmable Brown-Out Detection.

The Program and Debug Interface (PDI), a fast 2-pin interface for programming and debugging,

is available. The devices also have an IEEE std. 1149.1 compliant JTAG test interface, and this

can also be used for On-chip Debug and programming.

The XMEGA A devices have five software selectable power saving modes. The Idle mode stops

the CPU while allowing the SRAM, DMA Controller, Event System, Interrupt Controller and all

peripherals to continue functioning. The Power-down mode saves the SRAM and register con-

tents but stops the oscillators, disabling all other functions until the next TWI or pin-change

interrupt, or Reset. In Power-save mode, the asynchronous Real Time Counter continues to run,

allowing the application to maintain a timer base while the rest of the device is sleeping. In

Standby mode, the Crystal/Resonator Oscillator is kept running while the rest of the device is

sleeping. This allows very fast start-up from external crystal combined with low power consump-

tion. In Extended Standby mode, both the main Oscillator and the Asynchronous Timer continue

to run. To further reduce power consumption, the peripheral clock to each individual peripheral

can optionally be stopped in Active mode and Idle sleep mode.

The devices are manufactured using Atmel's high-density nonvolatile memory technology. The

program Flash memory can be reprogrammed in-system through the PDI or JTAG. A Bootloader

running in the device can use any interface to download the application program to the Flash

memory. The Bootloader software in the Boot Flash section will continue to run while the Appli-

cation Flash section is updated, providing true Read-While-Write operation. By combining an

8/16-bit RISC CPU with In-System Self-Programmable Flash, the Atmel XMEGA A is a powerful

microcontroller family that provides a highly flexible and cost effective solution for many embed-

ded applications.

The XMEGA A devices are supported with a full suite of program and system development tools

including: C compilers, macro assemblers, program debugger/simulators, programmers, and

evaluation kits.

XMEGAA Datasheet(PDF) 3 Page - ATMEL Corporation

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