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XMEGAA Datasheet(PDF) 30 Page - ATMEL Corporation

Part # XMEGAA
Description  Interrupts and Programmable Multi-level Interrupt Controller
PDF  445 Pages
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

XMEGAA Datasheet(HTML) 30 Page - ATMEL Corporation

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30
8077H–AVR–12/09
XMEGA A
4.16
Register Description – Fuses and Lockbits
4.16.1
FUSEBYTE0 - Non-Volatile Memory Fuse Byte 0 - JTAG User ID
• Bit 7 - JTAGUID[7:0]: JTAG USER ID
These fuses can be used to set the default JTAG USER ID for the device. During reset, the
JTAGUID fuse bits will be loaded into the MCU JTAG User ID Register.
4.16.2
FUSEBYTE1 - Non-Volatile Memory Fuse Byte1 - Watchdog Configuration
• Bit 7:4 - WDWPER[3:0]: Watchdog Window Timeout Period
The WDWPER fuse bits are used to set initial value of the closed window for the Watchdog
Timer in Window Mode. During reset these fuse bits are automatically written to the WPER bits
Watchdog Window Mode Control Register, refer to Section 11.7.2 ”WINCTRL – Window Mode
Control Register” on page 120 for details.
• BIT 3:0 - WDPER[3:0]: Watchdog Timeout Period
The WDPER fuse bits are used to set initial value of the Watchdog Timeout Period. During reset
these fuse bits are automatically written to the PER bits in the Watchdog Control Register, refer
to Section 11.7.1 ”CTRL – Watchdog Timer Control Register” on page 119 for details.
4.16.3
FUSEBYTE2 - Non-Volatile Memory Fuse Byte2 - Reset Configuration
• Bit 7 - Reserved
This fuse bit is reserved. For compatibility with future devices, always write this bit to one when
this register is written.
Bit
7
6
5432
10
+0x00
JTAGUID[7:0]
FUSEBYTE0
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial Value
0
0
0000
00
Bit
7
6
5432
10
+0x01
WDWPER[3:0]
WDPER[3:0]
FUSEBYTE1
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial Value
0
0
0000
00
Bit
7
6
5
4
3210
+0x02
–
BOOTRST
–
–
–
–
BODPD[1:0]
FUSEBYTE2
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial Value
1
1
1
1
1111



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