XMEGAA datasheet(29/445 Pages) ATMEL

29 / 445 page

8077H–AVR–12/09

XMEGA A

• Bit 5:2 - Reserved

These bits are reserved and will always be read as zero. For compatibility with future devices,

always write these bits to zero when this register is written.

• Bit 1 - EELOAD: EEPROM Page Buffer Active Loading

The EELOAD status flag indicates that the temporary EEPROM page buffer has been loaded

with one or more data bytes. Immediately after an EEPROM load command is issued and byte is

written to NVMDR, or a memory mapped EEPROM buffer load operation is performed, the

EELOAD flag is set, and it remains set until an EEPROM page write- or a page buffer flush oper-

ation is executed.

• Bit 0 - FLOAD: Flash Page Buffer Active Loading

The FLOAD flag indicates that the temporary Flash page buffer has been loaded with one or

more data bytes. Immediately after a Flash load command has been issues and byte is written to

NVMDR, the FLOAD flag is set, and it remains set until an Application- or Boot page write- or a

page buffer flush operation is executed.

4.15.12

LOCKBITS - Non-Volatile Memory Lock Bit Register

This register is a direct mapping of the NVM Lockbits into the IO Memory Space, in order to

enable direct read access from the application software. Refer to ”LOCKBITS - Non-Volatile

Memory Lock Bit Register” on page 34 for description of the Lock Bits.

Bit

543

210

+0x07

BLBB[1:0]

BLBA[1:0]

BLBAT[1:0]

LB[1:0]

LOCKBITS

Read/Write

RRR

Initial Value

XMEGAA Datasheet(PDF) 29 Page - ATMEL Corporation