XMEGAA datasheet(22/445 Pages) ATMEL

Part #	XMEGAA

Description	Interrupts and Programmable Multi-level Interrupt Controller

PDF	445 Pages

Scroll/Zoom	100%

Manufacturer	ATMEL [ATMEL Corporation]

Direct Link	http://www.atmel.com

Logo

22 / 445 page

8077H–AVR–12/09

XMEGA A

4.5

Data Memory

The Data memory contains the I/O Memory, internal SRAM, optionally memory mapped

EEPROM and external memory if available. The data memory is organized as one continuous

memory section, as shown in Figure 4-2 on page 22.

Figure 4-2.

Data Memory Map

I/O Memory, EEPROM and SRAM will always have the same start addresses for all XMEGA

devices. External Memory (if exist) will always start at the end of Internal SRAM and end at

address 0xFFFFFF.

4.6

Internal SRAM

The internal SRAM is mapped in the Data Memory space, always starting at hexadecimal

address location 0x2000. SRAM is accessed from the CPU by using the load (LD/LDS/LDD) and

store (ST/STS/STD) instructions.

Start/End

Address

I/O Memory

(Up to 4 KB)

EEPROM

(Up to 4 KB)

Internal SRAM

External Memory

(0 to 16 MB)

0x000000

0x001000

0xFFFFFF

0x002000

Data Memory

XMEGAA Datasheet(PDF) 22 Page - ATMEL Corporation