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MPC5606S Datasheet(PDF) 111 Page - Freescale Semiconductor, Inc |
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MPC5606S Datasheet(HTML) 111 Page - Freescale Semiconductor, Inc |
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111 / 136 page ![]() MPC5606S Microcontroller Data Sheet, Rev. 6 Freescale Semiconductor 111 Figure 35. IRQ and NMI timing 3.20.5 eMIOS timing 3.20.6 FlexCAN timing The CAN functions are available as TX pins at normal IO pads and as RX pins at the always on domain. There is no filter for the wakeup dominant pulse. Any high-to-low edge can cause wakeup if configured. Table 59. IRQ and NMI timing No. Symbol C Parameter Value Unit Min Max 1tIPWL CC T IRQ/NMI Pulse Width Low 200 — ns 2tIPWH CC T IRQ/NMI Pulse Width High 200 — ns 3tICYC CC T IRQ/NMI Edge to Edge Time1 1 Applies when IRQ/NMI pins are configured for rising edge or falling edge events, but not both. 400 — ns Table 60. eMIOS timing1 1 eMIOS timing specified at f SYS = 64 MHz, VDD12 = 1.14 V to 1.32 V, VDDE_x = 3.0 V to 5.5 V, TA = 40 to 105 °C, and CL = 50 pF with SRC = 0b00 No. Symbol C Parameter Value Unit Min2 2 There is no limitation on the peripheral for setting the minimum pulse width, the actual width is restricted by the pad delays. Refer to the pad specification section for the details. Max 1tMIPW CC D eMIOS input pulse width 4 — tCYC 2tMOPW CC D eMIOS output pulse width 1 — tCYC 1,2 3 1,2 |
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