AD9146 datasheet(16/52 Pages) AD

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AD9146

Rev. 0 | Page 16 of 52

SERIAL PORT OPTIONS

The serial port can support both MSB first and LSB first data

formats. This functionality is controlled by the LSB_FIRST bit

(Register 0x00, Bit 6). The default is MSB first (LSB_FIRST = 0).

When LSB_FIRST = 0 (MSB first), the instruction and data bits

must be written from MSB to LSB. Multibyte data transfers in

MSB first format start with an instruction byte that includes the

bytes should follow from high address to low address. In MSB first

mode, the serial port internal byte address generator decrements

for each data byte of the multibyte communication cycle.

When LSB_FIRST = 1 (LSB first), the instruction and data bits

must be written from LSB to MSB. Multibyte data transfers in

LSB first format start with an instruction byte that includes the

bytes should follow from low address to high address. In LSB first

mode, the serial port internal byte address generator increments

for each data byte of the multibyte communication cycle.

If the MSB first mode is active, the serial port controller data

address decrements from the data address written toward 0x00

for multibyte I/O operations. If the LSB first mode is active, the

serial port controller data address increments from the data

address written toward 0x7F for multibyte I/O operations.

R/W A6 A5

A4 A3

A2 A1 A0 D7N D6N D5N

D00

D10

D20

D30

INSTRUCTION CYCLE

DATA TRANSFER CYCLE

SCLK

SDIO

Figure 26. Serial Port Interface Timing, MSB First

SCLK

SDIO

A0 A1 A2

A3 A4

A5 A6 R/W D00 D10 D20

D7N

D6N

D5N

D4N

INSTRUCTION CYCLE

DATA TRANSFER CYCLE

Figure 27. Serial Port Interface Timing, LSB First

SCLK

SDIO

INSTRUCTION BIT 6

INSTRUCTION BIT 7

tDCSB

tDS

tDH

tPWH

tPWL

tSCLK

Figure 28. Timing Diagram for Serial Port Register Write

SCLK

SDIO

DATA BIT n – 1

DATA BIT n

tDV

Figure 29. Timing Diagram for Serial Port Register Read

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