AD9146 datasheet(24/52 Pages) AD

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AD9146

Rev. 0 | Page 24 of 52

Name

Address

(Hex)

Bits

Name

Description

Default

Datapath

Config

0x1E

Set to 1

Set this bit to 1 for proper operation. (The default value

must be changed from 0 to 1.)

Chip ID

0x1F

[7:0]

Chip ID[7:0]

This register identifies the device as an AD9146.

00001000

I Phase Adj

LSB

0x38

[7:0]

I Phase Adj[7:0]

See Register 0x39.

00000000

I Phase Adj

MSB

0x39

[1:0]

I Phase Adj[9:8]

I Phase Adj[9:0] is used to insert a phase offset between

the I and Q datapaths. This offset can be used to correct

for phase imbalance in a quadrature modulator. See the

Quadrature Phase Correction section for more information.

Q Phase Adj

LSB

0x3A

[7:0]

Q Phase Adj[7:0]

See Register 0x3B.

00000000

Q Phase Adj

MSB

0x3B

[1:0]

Q Phase Adj[9:8]

Q Phase Adj[9:0] is used to insert a phase offset between

the I and Q datapaths. This offset can be used to correct

for phase imbalance in a quadrature modulator. See the

Quadrature Phase Correction section for more information.

I DAC Offset

LSB

0x3C

[7:0]

I DAC Offset[7:0]

See Register 0x3D.

00000000

I DAC Offset

MSB

0x3D

[7:0]

I DAC Offset[15:8]

I DAC Offset[15:0] is a value that is added directly to the

samples written to the I DAC.

00000000

Q DAC

Offset LSB

0x3E

[7:0]

Q DAC Offset[7:0]

See Register 0x3F.

00000000

Q DAC

Offset MSB

0x3F

[7:0]

Q DAC Offset[15:8]

Q DAC Offset[15:0] is a value that is added directly to the

samples written to the Q DAC.

00000000

I DAC

FS Adjust

0x40

[7:0]

I DAC FS Adj[7:0]

See Register 0x41, Bits[1:0].

11111001

I DAC

Control

0x41

I DAC sleep

1 = puts the I DAC into sleep mode (fast wake-up mode).

[1:0]

I DAC FS Adj[9:8]

I DAC FS Adj[9:0] sets the full-scale current of the I DAC.

The full-scale current can be adjusted from 8.64 mA to

31.68 mA in step sizes of approximately 22.5 μA.

0x000 = 8.64 mA.

…

0x200 = 20.16 mA.

…

0x3FF = 31.68 mA.

I Aux DAC

Data

0x42

[7:0]

I Aux DAC[7:0]

See Register 0x43, Bits[1:0].

00000000

I Aux DAC

Control

0x43

I aux DAC sign

0 = the I auxiliary DAC sign is positive, and the current is

directed to the IOUT1P pin (Pin 47).

1 = the I auxiliary DAC sign is negative, and the current is

directed to the IOUT1N pin (Pin 46).

I aux DAC current

direction

0 = the I auxiliary DAC sources current.

1 = the I auxiliary DAC sinks current.

I aux DAC sleep

1 = puts the I auxiliary DAC into sleep mode.

[1:0]

I Aux DAC[9:8]

I Aux DAC[9:0] sets the magnitude of the auxiliary DAC

current. The range is 0 mA to 2 mA, and the step size is 2 μA.

0x000 = 0.000 mA.

0x001 = 0.002 mA.

…

0x3FF = 2.046 mA.

Q DAC

FS Adjust

0x44

[7:0]

Q DAC FS Adj[7:0]

See Register 0x45, Bits[1:0].

11111001

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