TLE6368 datasheet(17/59 Pages) INFINEON

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TLE 6368 / SONIC

Data Sheet

Rev. 2.2, 2006-12-01

been read in at the DI line becomes the new control word. The DO output switches to

tristate status at this point, thereby releasing the DO bus circuit for other uses. For details

of the SPI timing please refer to Figures 10 to 13.

The SPI will be reset to default values given in the following table “write bit meaning” if

the RAM good flag of Q_LDO1 indicates a cold start (lower output voltage than 3.3V).

The reset will be active as long as the power on reset is present so during the reset delay

time at power up no SPI commands are accepted.

The register content of the SPI - including watchdog timings and reset delay timings - is

maintained if the RAM good flag of Q_LDO1 indicates a warm start (i.e. Q_LDO1 did not

decrease below 3.3V).

2.12.1 Write mode

The following tables show the bit assignment to the different control functions, how to

change settings with the right bit combination and also the default status at power up.

2.12.2 Write mode bit assignment

Figure 8 Write Bit assignment

Write Bit meaning

Function

Bit

Combination

Default

Not assigned

Tracker 1 to 6 - control:

turn on/off the individual trackers

0: OFF

1: ON

Power down:

send device to sleep

0: SLEEP

1: NORMAL

WD_

OFF1

T6-

control

T5-

control

T4-

control

T6-

control

T2-

control

T1-

control

NOT

assigned

sleep

WD_

TRIG

WD_

OFF3

WD2

WD1

reset 2

reset 1

WD_

OFF2

BIT

Default

Name

D 15

D10

D11

D12

D13

D14

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