CC2480 datasheet(32/48 Pages) TI

32 / 48 page

CC2480

PHY

Layer

Frame

Control Field

(FCF)

Data

Sequence

Number

Bytes:

Address

Information

0 to 20

Frame payload

Frame Check

Sequence

(FCS)

MAC Header (MHR)

MAC Payload

MAC Footer

(MFR)

Frame

Length

MAC Protocol

Data Unit

(MPDU)

Start of frame

Delimiter

(SFD)

Bytes:

5 + (0 to 20) + n

Preamble

Sequence

Synchronisation Header

(SHR)

PHY Header

(PHR)

PHY Service Data Unit

(PSDU)

PHY Protocol Data Unit

(PPDU)

11 + (0 to 20) + n

MAC

Layer

Figure 13: Schematic view of the IEEE 802.15.4 Frame Format [1]

10.4

Synchronization header

The synchronization header (SHR) consists of

the preamble sequence followed by the start of

frame delimiter (SFD). In [1], the preamble

sequence is defined to be four bytes of 0x00.

The SFD is one byte, set to 0xA7.

synchronization

header

always

transmitted first in all transmit modes.

In receive mode

CC2480 uses the preamble

sequence for symbol synchronization and

frequency offset adjustments. The SFD is

used

for

byte

synchronization.

10.5

MAC protocol data unit

The FCF, data sequence number and address

information follows the length field as shown in

Figure 13. Together with the MAC data

payload and Frame Check Sequence, they

form the MAC Protocol Data Unit (MPDU).

The format of the FCF is shown in Figure 14.

Please refer to [1] for details.

Bits: 0-2

7-9

10-11

12-13

14-15

Frame

Type

Security

Enabled

Frame

Pending

Acknowledge

request

Intra

PAN

Reserved

Destination

addressing

mode

Reserved

Source

addressing

mode

Figure 14: Format of the Frame Control Field (FCF) [1]

10.6

Frame check sequence

A 2-byte frame check sequence (FCS) follows

the last MAC payload byte as shown in Figure

13. The FCS is calculated over the MPDU, i.e.

the length field is not part of the FCS.

The FCS polynomial is [1]:

16 + x12 + x5 + 1

The

CC2480 hardware implementation is

shown in Figure 15. Please refer to [1] for

further details.

In transmit mode the FCS is appended at the

correct position defined by the length field.

The most significant bit in the last byte of each

frame is set high if the CRC of the received

frame is correct and low otherwise.

r10

r11

r12

r13

r14

r15

Data

input

(LSB

first)

Figure 15:

CC2480 Frame Check Sequence (FCS) hardware implementation [1]

CC2480 Data Sheet SWRS074

Page 32 of 43

CC2480 Datasheet(PDF) 32 Page - Texas Instruments

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