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AM3871 Datasheet(PDF) 213 Page - Texas Instruments |
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AM3871 Datasheet(HTML) 213 Page - Texas Instruments |
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213 / 345 page  AM3874, AM3872, AM3871 www.ti.com SPRS695 – SEPTEMBER 2011 Table 8-12. Ethernet MAC Switch Registers (continued) ARM/L3 MASTERS EMAC HEX ACRONYM REGISTER NAME ADDRESS RANGE 0x4A10 0148 TX_PRI6_RATE CPDMA_REGS Transmit (Ingress) Priority 6 Rate 0x4A10 014C TX_PRI7_RATE CPDMA_REGS Transmit (Ingress) Priority 7 Rate 0x4A10 0150 – 0x4A10 017C – Reserved 0x4A10 0180 TX_INTSTAT_RAW CPDMA_INT TX Interrupt Status Register (Raw Value) 0x4A10 0184 TX_INTSTAT_MASKED CPDMA_INT TX Interrupt Status Register (Masked Value) 0x4A10 0188 TX_INTMASK_SET CPDMA_INT TX Interrupt Mask Set Register 0x4A10 018C TX_INTMASK_CLEAR CPDMA_INT TX Interrupt Mask Clear Register 0x4A10 0190 CPDMA_IN_VECTOR CPDMA_INT Input Vector (Read Only) 0x4A10 0194 CPDMA_EOI_VECTOR CPDMA_INT End Of Interrupt Vector 0x4A10 0198 – 0x4A10 019C – Reserved 0x4A10 01A0 RX_INTSTAT_RAW CPDMA_INT RX Interrupt Status Register (Raw Value) 0x4A10 01A4 RX_INTSTAT_MASKED CPDMA_INT RX Interrupt Status Register (Masked Value) 0x4A10 01A8 RX_INTMASK_SET CPDMA_INT RX Interrupt Mask Set Register 0x4A10 01AC RX_INTMASK_CLEAR CPDMA_INT RX Interrupt Mask Clear Register 0x4A10 01B0 DMA_INTSTAT_RAW CPDMA_INT DMA Interrupt Status Register (Raw Value) 0x4A10 01B4 DMA_INTSTAT_MASKED CPDMA_INT DMA Interrupt Status Register (Masked Value) 0x4A10 01B8 DMA_INTMASK_SET CPDMA_INT DMA Interrupt Mask Set Register 0x4A10 01BC DMA_INTMASK_CLEAR CPDMA_INT DMA Interrupt Mask Clear Register 0x4A10 01C0 RX0_PENDTHRESH CPDMA_INT Receive Threshold Pending Register Channel 0 0x4A10 01C4 RX1_PENDTHRESH CPDMA_INT Receive Threshold Pending Register Channel 1 0x4A10 01C8 RX2_PENDTHRESH CPDMA_INT Receive Threshold Pending Register Channel 2 0x4A10 01CC RX3_PENDTHRESH CPDMA_INT Receive Threshold Pending Register Channel 3 0x4A10 01D0 RX4_PENDTHRESH CPDMA_INT Receive Threshold Pending Register Channel 4 0x4A10 01D4 RX5_PENDTHRESH CPDMA_INT Receive Threshold Pending Register Channel 5 0x4A10 01D8 RX6_PENDTHRESH CPDMA_INT Receive Threshold Pending Register Channel 6 0x4A10 01DC RX7_PENDTHRESH CPDMA_INT Receive Threshold Pending Register Channel 7 0x4A10 01E0 RX0_FREEBUFFER CPDMA_INT Receive Free Buffer Register Channel 0 0x4A10 01E4 RX1_FREEBUFFER CPDMA_INT Receive Free Buffer Register Channel 1 0x4A10 01E8 RX2_FREEBUFFER CPDMA_INT Receive Free Buffer Register Channel 2 0x4A10 01EC RX3_FREEBUFFER CPDMA_INT Receive Free Buffer Register Channel 3 0x4A10 01F0 RX4_FREEBUFFER CPDMA_INT Receive Free Buffer Register Channel 4 0x4A10 01F4 RX5_FREEBUFFER CPDMA_INT Receive Free Buffer Register Channel 5 0x4A10 01F8 RX6_FREEBUFFER CPDMA_INT Receive Free Buffer Register Channel 6 0x4A10 01FC RX7_FREEBUFFER CPDMA_INT Receive Free Buffer Register Channel 7 0x4A10 0200 TX0_HDP CPDMA_STATERAM TX Channel 0 Head Desc Pointer (1) 0x4A10 0204 TX1_HDP CPDMA_STATERAM TX Channel 1 Head Desc Pointer (1) 0x4A10 0208 TX2_HDP CPDMA_STATERAM TX Channel 2 Head Desc Pointer (1) 0x4A10 020C TX3_HDP CPDMA_STATERAM TX Channel 3 Head Desc Pointer (1) 0x4A10 0210 TX4_HDP CPDMA_STATERAM TX Channel 4 Head Desc Pointer (1) 0x4A10 0214 TX5_HDP CPDMA_STATERAM TX Channel 5 Head Desc Pointer (1) 0x4A10 0218 TX6_HDP CPDMA_STATERAM TX Channel 6 Head Desc Pointer (1) 0x4A10 021C TX7_HDP CPDMA_STATERAM TX Channel 7 Head Desc Pointer (1) 0x4A10 0220 RX0_HDP CPDMA_STATERAM RX 0 Channel 0 Head Desc Pointer (1) 0x4A10 0224 RX1_HDP CPDMA_STATERAM RX 1 Channel 1 Head Desc Pointer (1) 0x4A10 0228 RX2_HDP CPDMA_STATERAM RX 2 Channel 2 Head Desc Pointer (1) (1) Denotes CPPI 3.0 registers. Copyright © 2011, Texas Instruments Incorporated Peripheral Information and Timings 213 Submit Documentation Feedback Product Folder Link(s): AM3874 AM3872 AM3871 |
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