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AM3871 Datasheet(PDF) 219 Page - Texas Instruments |
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AM3871 Datasheet(HTML) 219 Page - Texas Instruments |
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219 / 345 page  EMAC[x]_MRCLK (Input) 1 2 EMAC[x]_M EMAC[x]_M EMAC[x]_M EMAC[x]_M RXD3− RXD0, RXDV, RXER (Inputs) 1 EMAC[x]_MTCLK (Input) EMAC[x]_M EMAC[x]_M EMAC[x]_M TXD3− TXD0, TXEN (Outputs) AM3874, AM3872, AM3871 www.ti.com SPRS695 – SEPTEMBER 2011 Table 8-15. Timing Requirements for EMAC [G]MII Receive 10/100/1000 Mbit/s (see Figure 8-11) 1000 Mbps (1 100/10 Mbps Gbps) NO. UNIT MIN MAX MIN MAX tsu(MRXD-MRCLK) Setup time, receive selected signals valid before 1 tsu(MRXDV-MRCLK) 2 8 ns EMAC[1:0]_MRCLK tsu(MRXER-MRCLK) th(MRCLK-MRXD) Hold time, receive selected signals valid after 2 th(MRCLK-MRXDV) 0 8 ns EMAC[1:0]_MRCLK th(MRCLK-MRXER) Figure 8-11. EMAC Receive Interface Timing [G]MII Operation Table 8-16. Switching Characteristics Over Recommended Operating Conditions for EMAC [G]MII Transmit 10/100 Mbits/s (see Figure 8-12) 100/10 Mbps NO. PARAMETER UNIT MIN MAX td(MTXCLK-MTXD) 1 Delay time, EMAC[x]_MTCLK to transmit selected signals valid 2.5 25 ns td(MTCLK-MTXEN) Table 8-17. Switching Characteristics Over Recommended Operating Conditions for EMAC [G]MII Transmit 1000 Mbits/s (see Figure 8-12) 1000 Mbps (1 Gbps) NO. PARAMETER UNIT MIN MAX td(GMTCLK-MTXD) 1 Delay time, EMAC[x]_GMTCLK to transmit selected signals valid 0.5 5 ns td(GMTCLK-MTXEN) Figure 8-12. EMAC Transmit Interface Timing [G]MII Operation Copyright © 2011, Texas Instruments Incorporated Peripheral Information and Timings 219 Submit Documentation Feedback Product Folder Link(s): AM3874 AM3872 AM3871 |
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