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MCP3903 Datasheet(PDF) 44 Page - Microchip Technology

Part # MCP3903
Description  Six Channel Delta Sigma A/D Converter
PDF  54 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MCP3903 Datasheet(HTML) 44 Page - Microchip Technology

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MCP3903
DS25048B-page 44
© 2011 Microchip Technology Inc.
7.6
Config Register - Configuration
Register
TABLE 7-8:
CONFIG Register
Name
Bits
Address
Cof
CONFIG
24
0x0A
R/W
REGISTER 7-6:
CONFIG REGISTER
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
RESET_CH5
RESET_CH4
RESET_CH3
RESET_CH2
RESET_CH1 RESET_CH0 SHUTDOWN_CH5
SHUTDOWN_CH4
bit 23
bit 16
R/W-0
R/W-0
R/W-0
R/W-0
R/W-1
R/W-1
R/W-1
R/W-1
SHUTDOWN_
CH3
SHUTDOWN_
CH2
SHUTDOWN_CH1 SHUTDOWN_CH0 DITHER_CH5 DITHER_CH4
DITHER_CH3
DITHER_CH2
bit 15
bit 8
R/W-1
R/W-1
R/W-0
R/W-1
R/W-0
R/W-0
R/W-0
R/W-0
DITHER_CH1
DITHER_CH0
OSR1
OSR0
PRESCALE1 PRESCALE0
EXTVREF
EXTCLK
bit 7
bit 0
bit 23:18
RESET_CHn:
Reset mode setting for ADCs
1
= Reset mode for the corresponding ADC channel ON
0
= Reset mode for the corresponding ADC chnnel OFF (default)
bit 17:12
SHUTDOWN_CHn:
Shutdown mode setting for ADCs
1
= Shutdown mode for the corresponding ADC channel ON
0
= Shutdown mode for the corresponding ADC channel OFF(default)
bit 11:6
DITHER_CHn:
Control for dithering circuit for idle tones cancellation
1
= Dithering circuit for the corresponding ADC channel ON (default)
0
= Dithering circuit for the corresponding ADC channel OFF
bit 5:4
OSR[1:0]
Oversampling Ratio for Delta Sigma A/D Conversion (ALL CHANNELS, f
d / fS)
11
= 256
10
= 128
01
= 64 (default)
00
= 32
bit 3:2
PRESCALE[1:0]
Internal Master Clock (AMCLK) Prescaler Value
11
= AMCLK = MCLK/ 8
10
= AMCLK = MCLK/ 4
01
= AMCLK = MCLK/ 2
00
= AMCLK = MCLK (DEFAULT)
bit 1
EXTVREF
Internal Voltage Reference Shutdown Control
1
= Internal Voltage Reference Disabled
0
= Internal Voltage Reference Enabled (default)
bit 0
EXTCLK
Clock Mode
1
= CLOCK Mode (Internal Oscillator Disabled - Lower Power)
0
= XT Mode - A crystal must be placed between OSC1/OSC2 (default)



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