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LPC1850 Datasheet(PDF) 147 Page - NXP Semiconductors |
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LPC1850 Datasheet(HTML) 147 Page - NXP Semiconductors |
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147 / 157 page ![]() LPC1850_30_20_10 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Preliminary data sheet Rev. 3 — 6 December 2011 147 of 157 NXP Semiconductors LPC1850/30/20/10 32-bit ARM Cortex-M3 microcontroller Conditions: VBAT = 0 V; VDD(IO) = 0 V; PD0_SLEEP0_MODE = 0x003F FCBA. Fig 57. Typical supply current versus temperature in Power-down mode Conditions: VBAT = 0 V; VDD(IO) = 0 V; PD0_SLEEP0_MODE = 0x003F FF7F. Fig 58. Typical supply current versus temperature in Deep power-down mode temperature (°C) -40 85 35 10 60 -15 002aag124 20 40 60 IDD(REG)(3V3) (μA) 0 VDD(REG)(3V3) = 3.6 V 3.0 V 2.6 V 2.2 V 002aag125 temperature (°C) -40 85 35 10 60 -15 VDD(REG)(3V3) = 3.6 V 2.2 V 4.0 8.0 2.0 6.0 10.0 IDD(REG)(3V3) (μA) 0 |
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