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LPC1850 Datasheet(PDF) 149 Page - NXP Semiconductors |
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LPC1850 Datasheet(HTML) 149 Page - NXP Semiconductors |
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149 / 157 page ![]() LPC1850_30_20_10 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Preliminary data sheet Rev. 3 — 6 December 2011 149 of 157 NXP Semiconductors LPC1850/30/20/10 32-bit ARM Cortex-M3 microcontroller JTAG Joint Test Action Group LCD Liquid Crystal Display LSB Least Significant Bit LQFP Low Quad Flat Package MAC Media Access Control MCU MicroController Unit MIIM Media Independent Interface Management n.c. not connected OTG On-The-Go PHY PHYsical layer PLL Phase-Locked Loop PWM Pulse Width Modulator RMII Reduced Media Independent Interface SDRAM Synchronous Dynamic Random Access Memory SPI Serial Peripheral Interface SSI Serial Synchronous Interface SSP Synchronous Serial Port TCP/IP Transmission Control Protocol/Internet Protocol TTL Transistor-Transistor Logic UART Universal Asynchronous Receiver/Transmitter ULPI UTMI+ Low Pin Interface USART Universal Synchronous Asynchronous Receiver/Transmitter USB Universal Serial Bus UTMI USB 2.0 Transceiver Macrocell Interface Table 34. Abbreviations …continued Acronym Description |
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