LPC1850 datasheet(152/157 Pages) PHILIPS

152 / 157 page

LPC1850_30_20_10

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Preliminary data sheet

Rev. 3 — 6 December 2011

152 of 157

NXP Semiconductors

LPC1850/30/20/10

32-bit ARM Cortex-M3 microcontroller

LPC1850_30_20_10 v.2

20110713

Objective data sheet

LPC1850_30_20_10 v.1.2

Modifications:

• Power consumption data added (Figure 12 to Figure 17).

• Pin PC_0 in Table 3: function ENET_RX_CLK changed to n.c. and function

SDIO_CLK changed to function ENET_RX_CLK.

• Pin PC_8 in Table 3: ENET_RX_DV applies to RMII/MII interfaces.

• Rename pins CAN1_RD and CAN1_TD to CAN0_RD and CAN0_TD in Table 3.

• Rename all I2S pins to I2S0 pins.

• Condition for RTC operation updated in Table 8, Table note 2.

• Figure 11 “LPC1850/30/20/10 Power domains” added.

• “n.c.” changed to “Reserved” in Table 3.

• Section 11.6: characterization parameters and timing diagrams updated.

• Prefix for all SD/MMC pins changed to “SD” in Table 3.

• Prefix for all EMC pins changed to “EMC” in Table 3.

• Section 11.4 added.

• Section 11.8 added.

• Section 11.9 added.

• LQFP144 pinout added in Table 3.

• Updates related to the Rev ‘A’ version of parts LPC1850/30/20/10:

– Pin P6_0 in Table 3: function I2S_RX_SCK moved to function level 5.

– Pin PF_0 in Table 3: function GP_CLKIN added.

– Pin PA_1 in Table 3: function U2_TXD added.

– Pin PA_2 in Table 3: function U2_RXD added.

– Pin PC_0 in Table 3: reset state changed to I; PU.

– Pin P1_16 in Table 3: ENET_CRS_DV moved to function level 7.

– Pad descriptions updated in Table 3, Table note 3 to Table note 11.

– Added function levels four to seven/eight for each pin in Table 3.

– Second C_CAN interface (C_CAN1) added.

– Second I2S interface (I2S1) added.

– Audio PLL added (Section 2 and Section 7.18.6).

– All SDIO functions moved to the function levels four to seven in Table 3.

– High-speed GPIO block moved to address 0x400F 4000 in Figure 9 and

Figure 10.

– GPIO interrupts and GPIO group0 and group1 interrupt added in Figure 1,

Figure 9, Figure 10, Section 2, and Section 7.12.

– Number of GPIO ports increased to eight.

– Total number of GPIO pins increased to 164.

– GIMA block added (Section 7.6).

– Band gap output added to pin PF_7.

– Package outline and soldering information added for all packages.

Table 35.

Revision history …continued

Document ID

Release date Data sheet status

Change notice

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