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OPA699M Datasheet(PDF) 24 Page - Texas Instruments

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Part # OPA699M
Description  GAIN 4 STABLE WIDEBAND VOLTAGE LIMITING AMPLIFIER
PDF  32 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

OPA699M Datasheet(HTML) 24 Page - Texas Instruments

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Time (10ns/div)
4
3
2
1
0
-1
-2
-3
-4
V
IN
V
OUT
G049
DESIGN-IN TOOLS
Applications Support
Demonstration Boards
OPERATING SUGGESTIONS
Theory of Operation
Output Limiters
OPA699M
SGLS289A – MAY 2005 – REVISED MARCH 2006
APPLICATION INFORMATION (continued)
Figure 57. Schmitt Trigger Time Domain Response for a 10-MHz Sinewave
The Texas Instruments Applications Department is available for design assistance at 1-972-644-5580. The Texas
Instruments web site (www.ti.com) has the latest product data sheets and other design tools.
A PC board is available to assist in the initial evaluation of circuit performance of the OPA699ID. It is available as
an unpopulated PCB with descriptive documentation, and can be requested through the Texas Instruments web
site. See the demonstration board literature for more information. The summary information for this board is
shown in Table 1.
Table 1. Evaluation Module Ordering Information
PRODUCT
PACKAGE
BOARD PART NUMBER
LITERATURE NUMBER
OPA699ID
SO-8
DEM-OPA-SO-1A
SBOU009
The OPA699 is a voltage-feedback, gain of +4 V/V stable op amp. The output voltage is limited to a range set by
the voltage on the limiter pins (5 and 8). When the input tries to overdrive the output, the limiters take control of
the output buffer. This action from the limiters avoids saturating any part of the signal path, giving quick overdrive
recovery and excellent limiter accuracy at any signal gain. The limiters have a sharp transition from the linear
region of operation to output limiting. This transition allows the limiter voltages to be set near (< 100 mV) the
desired signal range. The distortion performance is also good near the limiter voltages.
The output voltage is linearly dependent on the input(s) when it is between the limiter voltages VH (pin 8) and VL
(pin 5). When the output tries to exceed VH or VL, the corresponding limiter buffer takes control of the output
voltage and holds it at VH or VL. Because the limiters act on the output, their accuracy does not change with the
gain. The transition from the linear region of operation to output limiting is sharp—the desired output signal can
safely come to within 30 mV of VH or VL with no onset of non-linearity. The limiter voltages can be set to within
0.7 V of the supplies (VL = –VS + 0.7 V, VH = +VS– 0.7 V). They must also be at least 400 mV apart (VH– VL =
0.4 V). When pins 5 and 8 are left open, VH and VL go to the default voltage limit; the minimum values are given
in the electrical specifications. Looking at Figure 58 for the zero bias current case shows the expected range of
(VS– default limit voltages) = headroom.
24
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