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Power Supplies

input and ESD protection

External

Pin

+V

S

-V

S

Internal

Circuitry

S0051-01

OPA699M

SGLS289A – MAY 2005 – REVISED MARCH 2006

5. Choose low resistor values to minimize the time constant set by the resistor and its parasitic parallel

capacitance. Good metal film or surface mount resistors have approximately 0.2-pF parasitic parallel

capacitance. For resistors > 1.5 k

Ω, this adds a pole and/or zero below 500 MHz. Make sure that the output

loading is not too heavy. The recommended 750-

Ω feedback resistor is a good starting point in most

designs.

6. Use short direct traces to other wideband devices on the board. Short traces act as a lumped capacitive

load. Wide traces (50 to 100 mils) should be used. Estimate the total capacitive load at the output and use

Load. Parasitic loads < 2 pF may not need the isolation resistor.

7. When long traces are necessary, use transmission line design techniques (consult an ECL design

handbook for microstrip and stripline layout techniques). A 50-

Ω transmission line is not required on

board—a higher characteristic impedance helps reduce output loading. Use a matching series resistor at the

output of the op amp to drive a transmission line and a matched load resistor at the other end to make the

line appear as a resistor. If the 6 dB of attenuation that the matched load produces is not acceptable, and the

line is not too long, use the series resistor at the source only. This isolates the source from the reactive load

presented by the line, but the frequency response will be degraded. Multiple destination devices are best

handled as separate transmission lines, each with its own series source and shunt load terminations. Any

parasitic impedances acting on the terminating resistors alters the transmission line match and can cause

unwanted signal reflections and reactive loading.

8. Do not use sockets for high-speed parts like the OPA699. The additional lead length and pin-to-pin

capacitance introduced by the socket creates an extremely troublesome parasitic network. Best results are

obtained by soldering the part onto the board.

The OPA699 is nominally specified for operation using either ±5-V supplies or a single +5-V supply. The

maximum specified total supply voltage of 12 V allows reasonable tolerances on the supplies. Higher supply

voltages can break down internal junctions, possibly leading to catastrophic failure. Single-supply operation is

possible as long as common mode voltage constraints are observed. The common-mode input and output

voltage specifications can be interpreted as required headroom to the supply voltage. Observing this input and

output headroom requirement allows a design of non-standard or single-supply operation circuits. Figure 48

shows one approach to single-supply operation.

The OPA699 is built using a high-speed complementary bipolar process. The internal junction breakdown

voltages are relatively low for these small geometry devices. These breakdowns are reflected in the Absolute

Maximum Ratings table. All device pins are protected with internal ESD protection diodes to the power supplies,

as shown in Figure 64.

These diodes provide moderate protection to input overdrive voltages above the supplies as well. The protection

diodes can typically support 30-mA continuous current. Where higher currents are possible (e.g., in systems with

±15-V supply parts driving into the OPA699), current limiting series resistors should be added into the two inputs.

Keep these resistor values as low as possible, since high values degrade both noise performance and frequency

response.

Figure 64. I/O Pin ESD Protection

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