AFE030 datasheet(30/58 Pages) TI1

30 / 58 page

DAC

DIN

SCLK

Time

AFE030

SBOS588A

– DECEMBER 2011 – REVISED DECEMBER 2011

www.ti.com

Refer to Figure 35 for an illustration of this sequence.

Figure 35. Writing to the DAC Register

Table 6 lists the DAC Register configurations.

Table 6. DAC Registers

DAC PIN HIGH:

DAC REGISTER

<15:0>

LOCATION

BIT NAME

(0 = LSB)

DEFAULT

R/W

FUNCTION

DAC

<0>

—

Truncated

DAC

<1>

—

Truncated

DAC

<2>

—

Truncated

DAC

<3>

—

Truncated

DAC

<4>

—

Truncated

DAC

<5>

—

Truncated

DAC

<6>

—

DAC bit 0 = DAC LSB

DAC

<7>

—

DAC bit 1

DAC

<8>

—

DAC bit 2

DAC

<9>

—

DAC bit 3

DAC

<10>

—

DAC bit 4

DAC

<11>

—

DAC bit 5

DAC

<12>

—

DAC bit 6

DAC

<13>

—

DAC bit 7

DAC

<14>

—

DAC bit 8

DAC

<15>

—

DAC bit 9 = DAC MSB

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