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GC3021 Datasheet(PDF) 16 Page - Texas Instruments

Part # GC3021
Description  MIXER AND CARRIER REMOVAL CHIP
PDF  37 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

GC3021 Datasheet(HTML) 16 Page - Texas Instruments

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GRAYCHIP, INC.
- 14 -
JUNE 22, 1998
GC3021 MIXER AND CARRIER REMOVAL CHIP
DATA SHEET
This document contains information which may be changed at any time without notice
EOUT
PHASE ERROR OUT.
Active high
The phase error RAM output is clocked out of the chip on this pin.
This signal is made available mostly for diagnostic purposes.
SO
SYNC OUT.
Active low
This signal is either one of the input syncs, a reclocked version of
HSI, the one shot sync OS, or the internal counter’s terminal count
strobe TC.
C[0:15]
CONTROL DATA I/O BUS.
Active high
This is the 16 bit control data I/O bus. Control register contents are
loaded into the chip or read from the chip through these pins. The
chip will only drive these pins when CS is low and R/W is high.
A[0:8]
CONTROL ADDRESS BUS.
Active high
These pins are used to address the control registers, phase error
RAM and the snapram memory within the chip.
R/W
READ/WRITE CONTROL.
High for read, low for write
This pin determines if the control bus cycle is a read or write
operation. The pin is high for a read and is low for a write.
CS
CONTROL STROBE.
Active low
This control strobe enables the read or write operation. The
contents of the register or memory location selected by A[0:8] will
be output on C[0:15] when R/W is high and CS is low. If R/W is
low when CS goes low, then the selected register will be loaded
with the contents of C[0:15].
HCK,HCK
HIGH SPEED CLOCK INPUT.
Active high
The differential PECL clock used in the high speed mode to clock
in the double rate real data.
HSI,HSI
HIGH SPEED SYNC INPUT.
Active high
The differential PECL sync input used in the high speed mode to
synchronize the input format circuit.
HCKO
HS/2 CLOCK OUTPUT.
Active high
The high speed clock is divided by two and output on this pin. The
HCKO clock should be buffered if it is to be used by other circuits.
The buffered version of HCKO should be used as the CK input to
the chip.
VTERM
TERMINATION SUPPLY VOLTAGE.
Fixed voltage
The termination supply pins, The I, Q, HCK, HCK, HSI and HSI
pads have switchable 70 Ohm termination resistors tied to
VTERM. The VTERM voltage must not exceed VCC or be less
than GND.
VCC
SUPPLY VOLTAGE.
Fixed voltage
The power supply pins.
GND
CHIP GROUND.
Fixed voltage
The power supply ground pins.



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