CXA2000 datasheet(10/48 Pages) SONY

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CXA2000Q

Sync signal output for VSIN and HSIN.

The output can be selected from the

internal sync signals (Pin 53 or Pin 55) or

the external sync signal (Pin 56) by the

I2C bus.

Output signal level: 2Vp-p

(0.6Vp-p sync only)

Input/output gain: 6dB

VSIN

Sync signal input for V sync separation.

Input a 2Vp-p Y signal (or a 0.6Vp-p

sync signal).

HSIN

Sync signal input for H sync separation.

Input a 2Vp-p Y signal (or a 0.6Vp-p sync

signal).

SYNCOUT

147

4.1V

20µA

15k

147

3.2V

10µA

14k

240µA

1.2k

40k

147

Outputs the differential waveform of the

VM (Velocity Modulation) Y signal.

(6.6VDC, 1.1Vp-p)

The signal advanced for 200ns from

YOUT is output. The delay time versus

YIN is determined by the DL setting of

the I2C bus. This output can be turned off

through the I2C bus.

This output can also be turned off by

YS1, YM, and YS2.

400µA

500

30k

147

1.2k

SCL

I2C bus protocol SCL (Serial Clock) input.

VILMAX = 1.5V

VIHMIN = 3.5V

No.

Symbol

Equivalent circuit

Description

CXA2000 Datasheet(PDF) 10 Page - Sony Corporation

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