R262 datasheet(18/28 Pages) ONSEMI

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BelaSigna R262

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Clocking, Channels & Algorithm Configuration

As mentioned in the Boot Control section, BelaSigna

R262 is controlled by hardware configuration. Just like the

BOOT_SEL signal discussed earlier, the CLOCK_SEL,

CHAN_SEL and ALPHA_SEL pins are also sampled by

BelaSigna R262 during its booting process using a

low−speed A/D converters (LSAD). Based on the actual

voltage that the chip reads on these pins, it will automatically

select a particular clock, output stage, channels and

algorithm configuration, as described in Tables 10, 11 and

12.

Table 10. CLOCK CONFIGURATION OPTIONS

Preset

Voltage Level

Clock Frequency

Description

0−2

0.65 − 1.00 V

2.048 MHz

A 2.048 MHz external clock is expected to be present on the EXT_CLK pin of

BelaSigna R262

0.50 − 0.63 V

2.4 MHz

A 2.4 MHz external clock is expected to be present on the EXT_CLK pin of

BelaSigna R262

0.36 − 0.49 V

2.8 MHz

A 2.8 MHz external clock is expected to be present on the EXT_CLK pin of

BelaSigna R262

0.22 − 0.35 V

3.072 MHz

A 3.072 MHz external clock is expected to be present on the EXT_CLK pin of

BelaSigna R262

0.08 − 0.21 V

26 MHz

A 26 MHz external clock is expected to be present on the EXT_CLK pin of

BelaSigna R262

0 − 0.07 V

Internal Oscillator

BelaSigna R262 runs off its internal system clock. No clock signal must be

present on the EXT_CLK pin. In this mode the sampling frequency can fluctu-

ate slightly from one device to another; see the electrical characteristics for

additional details. The performance of the algorithm itself is fully guaranteed.

Table 11. CHANNEL CONFIGURATION OPTIONS

Preset

Voltage Level

NR Outputs

Channel 0

Channel 1

Output Stage Configuration

0−2

0.65 − 1.00 V

Single

Start of Range

(as per BOOT_SEL)

N/A

Mono,

Differential

0.50 − 0.63 V

Dual

Start of Range

(as per BOOT_SEL)

Mixed Output

(as per BOOT_SEL &

ALPHA_SEL)

Stereo,

Single Ended

0.36 − 0.49 V

Dual

Mixed Output

(as per BOOT_SEL &

ALPHA_SEL)

End of Range

(as per BOOT_SEL)

Stereo,

Single Ended

0.22 − 0.35 V

Single

Mixed Output

(as per BOOT_SEL &

ALPHA_SEL)

N/A

Mono,

Differential

0.08 − 0.21 V

Single

Mixed Output

(as per BOOT_SEL &

ALPHA_SEL)

Algorithm Disabled

Stereo,

Single Ended

0 − 0.07 V

Single

Algorithm Disabled

Mixed Output

(as per BOOT_SEL &

ALPHA_SEL)

Stereo,

Single Ended

Table 12. MIXER CONFIGURATION OPTIONS

Preset

Voltage Level

Mixing Ratio

0−2

0.65 − 1.00 V

0% (Start of Range)

0.50 − 0.63 V

20% (Between Start and End of Range)

0.36 − 0.49 V

40% (Between Start and End of Range)

0.22 − 0.35 V

60% (Between Start and End of Range)

0.08 − 0.21 V

80% (Between Start and End of Range)

0 − 0.07 V

100% (End of Range)

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