R262 datasheet(24/28 Pages) ONSEMI

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BelaSigna R262

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Power Management Strategy & Battery Monitoring

BelaSigna R262 has a built−in power management unit

that guarantees valid system operation under any voltage

supply condition to prevent any unexpected audio output as

the result of any supply irregularity. The unit constantly

monitors the power supply and shuts down all functional

units (including all units in the audio path) when the power

supply voltage goes below a level at which point valid

operation can no longer be guaranteed.

The power management unit on BelaSigna R262 includes

power−on−reset (POR) functionality as well as power

supervisory circuitry, as shown in Figure 13. These two

components work together to ensure proper device

operation under all supply conditions.

The POR sequence is designed to ensure proper system

behavior during start−up and proper system configuration

after start−up. At the start of the POR sequence, the audio

output is disabled and all configuration and control registers

are asynchronously reset to their default values.

The power supervisory circuitry monitors the supply

voltage (VBAT). This circuit is used to start the system when

VBAT reaches a safe startup voltage, and to reset the system

when it drops below a relevant voltage threshold. The

relevant parameters are shown in Table 14.

Table 14. POWER MANAGEMENT PARAMETERS

Parameters

Voltage Level

VBAT startup

1.65 V ± 80 mV

VBAT shutdown

1.6 V ± 50 mV

The POR sequence consists of two phases: voltage supply

stabilization and boot ROM initialization. During the voltage

supply stabilization phase, the following steps are performed:

1. The internal regulators are enabled and allowed to

stabilize

2. The internal charge pump is enabled and allowed

to stabilize

3. SYSCLK is connected to all of the system

components (free−running PLL output)

4. The system runs the ROM application

At step 1, once the supply voltage rises above the startup

voltage and remains there for more than 5 ms, a signal will

enable the charge pump.

At step 2, another 5 ms delay is implemented to allow the

charge pump to stabilize before toggling the POR signal, and

thus enabling the digital core.

If the supply is consistent, the internal system voltage will

then remain at a fixed nominal voltage. If a spike occurs that

causes the voltage to drop below the shutdown internal

system voltage, the system will shut down. If the voltage

rises again above the startup voltage and remains there for

the required time, a POR sequence will occur again.

Once the ROM application is running, more system

monitoring is performed by the application; typically, the

software will permanently monitor the presence of an external

clock, and take the appropriate actions whenever it disappears.

See the system monitoring section for more information.

Digital Communication Interfaces

Debug Port (UART)

BelaSigna R262 has an RS232−based UART that can be

used to interface the chip from ON Semiconductor’s

communication tools. The debug port cannot be used for

customer applications. BelaSigna R262 can only be

configured using the I2C interface. See the I2C interface

section for information on how communication tools can

interface with BelaSigna R262.

General−Purpose Input Output (GPIO)

BelaSigna R262 has five GPIO pins which are all used

with specific functionalities. The five signals are SPI_CLK/

CLOCK_SEL,

SPI_CS/BOOT_SEL,

SPI_SERO/

CHAN_SEL, SPI_SERI/ALPHA_SEL and SWAP_CHAN.

SWAP_CHAN is used as a GPIO, consequently, it has an

internal pull

*up resistor. When used as LSADs

(CLOCK_SEL,

BOOT_SEL,

CHAN_SEL

and

ALPHA_SEL), the pull

*ups are disabled. If left floating in

LSAD mode, the pins have a weak pull

*down to ground.

See the Booting Control, Output and Channel Control and

Algorithm Control sections earlier in this document for

details on the behavior of these GPIO and LSAD pins.

Serial Peripheral Interface (SPI) Port

An SPI port is available on BelaSigna R262 for

applications such as communication with non−volatile

memory (EEPROM). The I/O levels on this port are defined

by the voltage on the VDDO pin. The SPI port operates in

master mode only, which supports communications with

slave SPI devices. The four signals needed by the SPI port

are multiplexed with other functions on BelaSigna R262

(GPIOs, LSADs). The use of the SPI port requires careful

design consideration with regards to the use of these other

functions.

I2C Interface

The I2C interface is an industry

*standard interface that

can be used for high

*speed transmission of data between

BelaSigna R262 and an external device. The interface

operates at speeds up to 400 kbit/sec. In product

development mode, the I2C interface is used for application

debugging purposes, communicating with the BelaSigna

R262 development tools, also known as SignaKlara

Development Utility (SKDU). The interface always

operates in slave mode and the slave address is 0x61.

A comprehensive command interface can be used with the

SKDU and other tools provided by ON Semiconductor. It

will offer a variety of support functions grouped in different

categories like general system control (system reset, status

information), application control (switching between

operating modes, enabling or disabling the algorithm),

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