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R262 Datasheet(PDF) 20 Page - ON Semiconductor |
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R262 Datasheet(HTML) 20 Page - ON Semiconductor |
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20 / 28 page ![]() BelaSigna R262 http://onsemi.com 20 I2C Command Handler The BelaSigna R262 ROM application contains an I2C−based command and control interface, allowing many aspects of the chip’s operation and hardware configuration to be controlled via I2C. This I2C interface is the recommended way to control the chip and to configure the application at run−time. The default I2C address of BelaSigna R262 is 0x61. The I2C interface protocol is fully supported by the SignaKlara Device Utility (SKDU) and other software tools provided by ON Semiconductor. For more information on the I2C interface, please refer to the I2C interface section of this document, as well as the BelaSigna R262 Communications and Configuration Guide. Reset BelaSigna R262 can be forced to execute a power−on−reset by pulling the NRESET pin to ground for at least 100 ns. NRESET is not available on the 26−ball WLCSP package. System Monitoring The application software within BelaSigna R262 is equipped with a few blocks that monitor system sanity. A watchdog timer is used to ensure proper execution of the signal processing application. It is always active and is periodically acknowledged as a check that the application is still running. Once the watchdog times out, a hardware system reset will occur. System sanity is also monitored by the clock detection mechanism; the chip will automatically enter Sleep mode if it is in Active or Bypass mode and it detects that the external clock source (the signal on EXT_CLK) is stopped. In this case, the system will only exit Sleep mode when it detects that the external clock source has been restored or a reset occurs. The power supply blocks of the system also monitor for minimum supply voltages as part of the power supervision strategy, as described in the Power Management section. Analog Blocks Input Stages The BelaSigna R262 analog audio input stage is shown in Figure 10. The input stage is comprised of two individual channels. There are four configurable aspects of each channel – input multiplexing, preamplifier gain, filtering and line out. The input multiplexing allows one input to be selected from any of the four possible inputs and then routed to the input of the preamplifier. Each preamplifier can be configured for bypass or gain values of 12 to 30 dB in 3 dB steps. The filters can be configured as well; the DC removal high−pass filter can be bypassed, or set to a cut−off frequency of 5 Hz, 10 Hz or 20 Hz (default). The low−pass filter can be either enabled with a 20 kHz cut−off frequency (default), or bypassed. The lineout selection allows the preamplifier outputs to be routed back out via the auxiliary audio input pins. Note that the AI1/LOUT1 pin is not available on the 26−ball WLCSP package option. Two analog−to−digital converters then convert the analog signals into the digital domain. The ADCs are running at a sampling rate of 21.3 kHz in Active mode and 16 kHz in Bypass mode. The sampling rate can potentially be changed using the I2C interface. Changing the sampling rate in Active mode will cause the noise cancellation algorithm to stop operating properly, so this should not be done; however, the sampling rate in Bypass mode could be changed to other values. Contact your local technical support for more information. Input signal amplitudes can also be adjusted in the digital domain; digital gain for both converted signals can be adjusted by using I2C commands. The ROM−based application pre−configures all these parameters in the input stage such that the algorithm operates properly. These parameters can be changed using the I2C interface, but careful design consideration should be taken when doing so, as this could alter the performance of the algorithm. The AI3 pin is multiplexed with the microphone power supply (VMIC). The default mode for the microphone bias is to be used as a 2 V power supply. Consequently, any application that plans to use the AI3 input pin or the LOUT0 functionality has to change the VMIC setting to high− impedance mode, such as the pin can be properly used as an analog input or a line−out. |
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