Preliminary Technical Information

AD6426

This Information applies to a product under development. Its characteristics and specifications are subject to change without notice. Analog Devices assumes no

obligation regarding future manufacture unless otherwise agreed to in writing. No responsibility is assumed by Analog Devices for its use; nor for any

infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent

rights of Analog Devices.

Revision Preliminary 2.3 (June 9, ´98)

- 33 -

Confidential Information

TIMING CHARACTERISTICS

Clocks

Parameter

Comment

Min

Typ

Max

Units

CLKIN Period (see Figure 13)

76.9

ns

CLKIN Width Low

30

45

ns

CLKIN Width High

30

45

ns

CLKOUT Period (see Figure 14)

76.9

ns

CLKOUT Width Low

30

45

ns

CLKOUT Width High

30

45

ns

To Ouput

Pin

CL

50pF

+2.1V

100

µA

I

OL

100

µA

I

OH

Figure 12. Load Circuit for Timing Specifications

t

2

t

3

t

1

CLKIN

Figure 13. Clock Input

CLKOUT

Figure 14. Clock Output