ADMC401 datasheet(47/60 Pages) AD

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ADMC401

–47–

REV. B

DM (0x2038)

CONVERT

START

ADCCTRL (R/W)

1 = EXTERNAL (CONVST)

0 = INTERNAL (PWMSYNC)

ADCOTR (R)

DM (0x203C)

0 = IN RANGE

1 = OUT OF RANGE

ADC0 (R)

ADC1 (R)

ADC2 (R)

ADC3 (R)

ADC4 (R)

ADC5 (R)

ADC6 (R)

ADC7 (R)

ADCXTRA(R)

DM (0x2030)

DM (0x2031)

DM (0x2032)

DM (0x2033)

DM (0x2034)

DM (0x2035)

DM (0x2036)

DM (0x2037)

DM (0x203B)

DM (0x2039)

ADCSTAT (R)

9876

543

210

9876

210

9876

543

210

ADC DATA

ADC0 OTR

ADC1 OTR

ADC3 OTR

ADC2 OTR

ADC7 OTR

ADC6 OTR

ADC4 OTR

ADC5 OTR

0 = IN RANGE

1 = OUT OF RANGE

00 = SIMULTANEOUS SAMPLING

01 = SEQUENTIAL SAMPLING

10 = OFFSET CALIBRATION

11 = GAIN CALIBRATION

ADC

MODE

ADC0 & ADC4

ADC1 & ADC5

ADC3 & ADC7

ADC2 & ADC6

0 = DATA REGISTERS NOT VALID

1 = DATA REGISTERS VALID

ADCXTRA OTR

0 = IN RANGE

1 = OUT OF RANGE

Figure 35. Structure of Registers of the ADMC401

Default bit values are shown; if no value is shown, the bit field is undefined at reset. Reserved bits are shown on a gray field—these

bits should always be written as shown.

ADMC401 Datasheet(PDF) 47 Page - Analog Devices

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