ADMC401 datasheet(54/60 Pages) AD

Part #	ADMC401

Description	Single-Chip, DSP-Based High Performance Motor Controller

PDF	60 Pages

Scroll/Zoom	100%

Manufacturer	AD [Analog Devices]

Direct Link	http://www.analog.com

Logo

54 / 60 page

REV. B

ADMC401

–54–

MODECTRL (R/W)

DM (0x2015)

DATA RECEIVE

SELECT

1 = DR1B

0 = DR1A

1 = UART MODE

0 = SPORT MODE

SPORT1

MODE

SYSSTAT (R)

DM (0x2016)

1 = HI

0 = LO

1 = WATCHDOG TRIP

0 = NO WATCHDOG TRIP

PWMTRIP

PIN STATE

WATCHDOG

FLAG

PWMPOL

PIN STATE

PWM PHASE

FLAG

1 = SECOND HALF CYCLE

0 = FIRST HALF CYCLE

PWM

MODE

1 = DOUBLE UPDATE

0 = SINGLE UPDATE

AUXILIARY

PWM MODE

1 = INDEPENDENT

0 = OFFSET

1 = HI => ACTIVE HI

0 = LO => ACTIVE LO

Figure 42. Structure of Registers of ADMC401

Default bit values are shown; if no value is shown, the bit field is undefined at reset. Reserved bits are shown on a gray field—these

bits should always be written as shown.

ADMC401 Datasheet(PDF) 54 Page - Analog Devices

ADMC401 Datasheet(HTML) 54 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Datasheet Download

Link URL