D0

D1

D2

D3

D4

D5

D6

D7

D8

D9

D10

D11

D12

D13

D14

D15

A0

A1

A2

A3

A4

A5

A6

RWB

SDIO

SDENB

SCLK

Read = 1

Write = 0

7 bit address space

16bit data: D15 is MSB, D0 is LSB

ADS5402

www.ti.com

SLAS936 – MARCH 2013

PROGRAMMING INTERFACE

The serial interface (SIF) included in the ADS5402 is a simple 3 or 4 pin interface. In normal mode, 3 pins are

used to communicate with the device. There is an enable (SDENB), a clock (SCLK) and a bi-directional IO port

(SDIO). If the user would like to use the 4 pin interface one write must be implemented in the 3 pin mode to

enable 4 pin communications. In this mode, the SDO pin becomes the dedicated output. The serial interface has

an 8-bit address word and a 16-bit data word. The first rising edge of SCLK after SDENB goes low will latch the

read/write bit. If a high is registered then a read is requested, if it is low then a write is requested. SDENB must

be brought high again before another transfer can be requested. The signal diagram is shown below:

Register Initialization

After power up, the internal registers must be initialized to the default values. This initialization can be

accomplished in one of two ways:

1. Either through hardware reset by applying a low pulse on SRESET pin

2. By applying a software reset. When using the serial interface, a reset can be performed by addressing

register x2C. This setting initializes the internal registers to the default values and then self-resets the

RESET register to 0. In this case the SRESET pin can be kept high.

Serial Register Write

The internal register of the ADS5402 can be programmed following these steps:

1. Drive SDENB pin low

2. Set the R/W bit to ‘0’ (bit A7 of the 8 bit address)

3. Initiate a serial interface cycle specifying the address of the register (A6 to A0) whose content has to be

written

4. Write 16bit data which is latched on the rising edge of SCLK

Figure 40. Serial Register Write Timing Diagram

PARAMETER

MIN

MAX

UNIT

SCLK frequency (equal to 1/tSCLK)

>DC

20

MHz

SDENB to SCLK setup time

25

ns

SCLK to SDENB hold time

25

ns

SDIO setup time

25

ns

SDIO hold time

25

ns

(1)

Typical values at +25°C; minimum and maximum values across the full temperature range: TMIN = –40°C to TMAX = +85°C, AVDD3V

= 3.3V, AVDD, DRVDD = 1.9V, unless otherwise noted.

Copyright © 2013, Texas Instruments Incorporated

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