WM8903 datasheet(41/178 Pages) WOLFSON

41 / 178 page

Production Data

WM8903

PD, Rev 4.5, June 2012

Figure 28 Digital Microphone Interface Control

When GPIO1 is configured as DMIC_LR Clock output, the WM8903 outputs a clock which supports

Digital Mic operation at a multiple of the ADC sampling rate, in the range 1-3MHz. The ADC and

Record Path filters must be enabled and the ADC sampling rate must be set in order to ensure

correct operation of all DSP functions associated with the digital microphone. Volume control for the

Digital Microphone Interface signals is provided using the ADC Volume Control.

See “Analogue-to-Digital Converter (ADC)” for details of the ADC Enable and volume control

functions. See “General Purpose Input/Output (GPIO)” for details of configuring the DMIC_LR and

DMIC_DAT functions. See “Clocking and Sample Rates” for the details of the supported clocking

configurations.

When GPIO2/DMIC_DAT is configured as DMIC_DAT input, then this pin is the digital microphone

input. Up to two microphones can share this pin; the two microphones are interleaved as illustrated in

Figure 29.

The digital microphone interface requires that MIC1 transmits a data bit each time that DMIC_LR is

high, and MIC2 transmits when DMIC_LR is low. The WM8903 samples the digital microphone data

in the middle of each DMIC_LR clock phase. Each microphone must tri-state its data output when the

other microphone is transmitting.

Figure 29 Digital Microphone Interface Timing

The digital microphone interface control fields are described in Table 9.

WM8903 Datasheet(PDF) 41 Page - Wolfson Microelectronics plc