WM8903 datasheet(65/178 Pages) WOLFSON

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Production Data

WM8903

PD, Rev 4.5, June 2012

HEADPHONE / LINE OUTPUT SIGNAL PATHS ENABLE

The Headphone / Line output paths can be actively discharged to AGND through internal resistors if

desired. This is desirable at start-up in order to achieve a known output stage condition prior to

enabling the VMID reference voltage. This is also desirable in shutdown to prevent the external

connections from being affected by the internal circuits. The ground-referenced Headphone outputs

and Line outputs are shorted to AGND by default; the short circuit is removed on each of these paths

by setting the applicable fields HPL_RMV_SHORT, HPR_RMV_SHORT, LINEOUTL_RMV_SHORT

or LINEOUTR_RMV_SHORT.

The ground-referenced Headphone output and Line output drivers are designed to suppress pops

and clicks when enabled or disabled. However, it is necessary to control the drivers in accordance

with a defined sequence in start-up and shut-down to achieve the pop suppression. It is also

necessary to schedule the DC Servo offset correction at the appropriate point in the sequence (see

“DC Servo”). Table 39 and Table 40 describe the recommended sequences for enabling and

disabling these output drivers.

SEQUENCE

HEADPHONE ENABLE

LINEOUT ENABLE

Step 1

HPL_ENA = 1

HPR_ENA = 1

LINEOUTL_ENA = 1

LINEOUTR_ENA = 1

Step 2

HPL_ENA_DLY = 1

HPR_ENA_DLY = 1

LINEOUTL_ENA_DLY = 1

LINEOUTR_ENA_DLY = 1

Step 3

DC offset correction

Step 4

HPL_ENA_OUTP = 1

HPR_ENA_OUTP = 1

LINEOUTL_ENA_OUTP = 1

LINEOUTR_ENA_OUTP = 1

Step 5

HPL_RMV_SHORT = 1

HPR_RMV_SHORT = 1

LINEOUTL_RMV_SHORT = 1

LINEOUTR_RMV_SHORT = 1

Table 39 Headphone / Line Output Enable Sequence

SEQUENCE

HEADPHONE DISABLE

LINEOUT DISABLE

Step 1

HPL_RMV_SHORT = 0

HPR_RMV_SHORT = 0

LINEOUTL_RMV_SHORT = 0

LINEOUTR_RMV_SHORT = 0

Step 2

HPL_ENA = 0

HPL_ENA_DLY = 0

HPL_ENA_OUTP = 0

HPR_ENA = 0

HPR_ENA_DLY = 0

HPR_ENA_OUTP = 0

LINEOUTL_ENA = 0

LINEOUTL_ENA_DLY = 0

LINEOUTL_ENA_OUTP = 0

LINEOUTR_ENA = 0

LINEOUTR_ENA_DLY = 0

LINEOUTR_ENA_OUTP = 0

Table 40 Headphone / Line Output Disable Sequence

The registers relating to Headphone / Line Output pop suppression control are defined in Table 41.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R90 (5Ah)

Analogue

HP 0

HPL_RMV_SHOR

Removes HPL short

0 = HPL short enabled

1 = HPL short removed

For normal operation, this bit should

be set as the final step of the HPL

Enable sequence.

HPL_ENA_OUTP

Enables HPL output stage

0 = Disabled

1 = Enabled

For normal operation, this bit should

be set to 1 after the DC offset

cancellation has been scheduled.

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