UPD78014 datasheet(30/58 Pages) RENESAS

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µPD78P083

Resonator

Recommended

Parameter

Test Conditions

MIN.

TYP.

MAX.

Unit

Circuit

Ceramic

Oscillation frequency

VDD = Oscillation voltage

1.0

5.0

MHz

resonator

(fX) Note 1

range

Oscillation stabilization

After VDD came to MIN.

time Note 2

of oscillation voltage range

Crystal

Oscillation frequency

1.0

5.0

MHz

resonator

(fX) Note 1

Oscillation stabilization

VDD = 4.5 to 5.5 V

time Note 2

External clock

X1 input frequency

1.0

5.0

MHz

(fX) Note 1

X1 input high- and

500

low-level widths (tXH, tXL)

Parameter

Symbol

Test Conditions

MIN.

TYP.

MAX.

Unit

Input capacitance

CIN

f = 1 MHz, Unmeasured pins returned to 0 V.

I/O capacitance

CIO

f = 1 MHz,

P01-P03, P10-P17, P30-P37,

Unmeasured pins

P50-P57, P70-P72, P100,

returned to 0 V.

P101

Capacitance (TA = 25

°C, VDD = VSS = 0 V)

Remark

Unless otherwise specified, dual-function pin characteristics are the same as port pin characteristics.

Main System Clock Oscillator Characteristics (TA = –40 to +85

°C, VDD = 1.8 to 5.5 V)

Notes 1. Only the oscillator characteristics are shown. For the instruction execution time, refer to AC Characteristics.

2. Time required for oscillation to stabilize after a reset or the STOP mode has been released.

Caution

When using the oscillation circuit of the main system clock, wire the portion enclosed in broken lines

in the figures as follows to avoid adverse influences on the wiring capacitance:

• Keep the wiring length as short as possible.

• Do not cross the wiring over other signal lines.

• Do not route the wiring in the vicinity of lines through which a high fluctuating current flows.

• Always keep the ground point of the capacitor of the oscillation circuit at the same potential as VSS.

• Do not connect the power source pattern through which a high current flows.

• Do not extract signals from the oscillation circuit.

VPP

PD74HCU04

UPD78014 Datasheet(PDF) 30 Page - Renesas Technology Corp

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