SO16N datasheet(32/51 Pages) STMICROELECTRONICS

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Application information

L6566BH

32/51

Doc ID 16610 Rev 2

Figure 20.

Operation after latched disable activation: timing diagram

5.10

Soft-start and delayed latched shutdown upon overcurrent

At device startup, a capacitor (CSS) connected between the SS pin (14) and ground is

charged by an internal current generator, ISS1, from zero up to about 2 V where it is

clamped. During this ramp, the overcurrent setpoint progressively rises from zero to the

value imposed by the voltage on the VFF pin (15, see

Section 5.6: PWM comparator, PWM

latch and voltage feedforward blocks); MOSFET conduction time increases gradually,

therefore controlling the startup inrush current. The time needed for the overcurrent setpoint

to reach its steady-state value, referred to as soft-start time, is approximately:

Equation 12

During the ramp (i.e. until VSS = 2 V) all the functions that monitor the voltage on the COMP

pin are disabled.

The soft-start pin is also invoked whenever the control voltage (COMP) saturates high,

which reveals an open loop condition for the feedback system. This condition very often

occurs at startup, but may be also caused by either a control loop failure or a converter

overload/short-circuit. A control loop failure results in an output overvoltage that is handled

by the OVP function of the L6566BH (see next section). In the case of QR operation, a

short-circuit causes the converter to run at a very low frequency, then with very low power

capability. This makes the self-supply system that powers the device unable to keep it

operating, so that the converter works intermittently, which is very safe. In the case of

AM11496v1

Vcc

(pin 5)

(pin 4)

Vin

VccON

VccON -0.5

4.5V

VccOFF

DIS

(pin 8)

Vccrestart

VHVstart

HV generator is turned on

HV generator turn-on is disabled here

Input source is removed here

AC_OK

(pin 16)

Vth

Disable latch is reset here

Restart is quicker

⎟⎟⎠

⎞

⎜⎜⎝

⎛ −

Css

)

(

Css

VFF

csx

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