ADV7281 datasheet(22/32 Pages) AD

Part #	ADV7281

Description	10-Bit, 4 Oversampled SDTV Video Decoder with Differential Inputs

PDF	32 Pages

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Manufacturer	AD [Analog Devices]

Direct Link	http://www.analog.com

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22 / 32 page

ADV7281

Data Sheet

Rev. A | Page 22 of 32

ITU-R BT.656 Tx CONFIGURATION (ADV7281 ONLY)

The ADV7281 receives analog video and outputs digital video

according to the ITU-R BT.656 specification. The ADV7281

outputs the ITU-R BT.656 video data stream over the P0 to P7

data pins and has a line-locked clock (LLC) pin.

Video data is output over the P0 to P7 pins in YCrCb 4:2:2 format.

Synchronization signals are automatically embedded in the video

data signal in accordance with the ITU-R BT.656 specification.

The LLC output is used to clock the output data on the P0 to P7

pins at a nominal frequency of 27 MHz.

ITU-R BT.656

DATA

STREAM

VIDEO

DECODER

ANALOG

VIDEO

INPUT

LLC

ADV7281

STANDARD

DEFINITION

PROCESSOR

ANALOG

FRONT

END

Figure 14. ITU-R BT.656 Output Stage of the ADV7281

ADV7281 Datasheet(PDF) 22 Page - Analog Devices