DP83840AVCE datasheet(2/91 Pages) TI1

2 / 91 page

National Semiconductor

Version A

March 1997

General Description

The DP83840A is a Physical Layer device for Ethernet

10BASE-T and 100BASE-X using category 5 Unshielded,

Type 1 Shielded and Fiber Optic cables.

This VLSI device is designed for easy implementation of

10/100 Mb/s Ethernet LANs. It interfaces to the PMD sub-

layer through National Semiconductor's DP83223 Twisted

Pair Transceiver, and to the MAC layer through a Media

Independent

Interface

(MII),

ensuring

interoperability

between products from different vendors.

The DP83840A is designed with National Semiconductor's

BiCMOS process. Its system architecture is based on the

integration of several of National Semiconductor's industry

proven core technologies:

10BASE-T ENDEC/Transceiver module to provide the 10

Mb/s IEEE 802.3 functions

Clock Recovery/Generator Modules from National

Semiconductor's leading FDDI product

FDDI Stream Cipher (Cyclone)

100BASE-X physical coding sub-layer (PCS) and control

logic that integrate the core modules into a dual speed

Ethernet physical layer controller

System Diagram

Features

•

IEEE 802.3 10BASE-T compatible--ENDEC and UTP/

STP transceivers and filters built-in

• IEEE 802.3u 100BASE-X compatible--support for 2 pair

Category 5 UTP (100m), Type 1 STP and Fiber Optic

Transceivers--Connects directly to the DP83223 Twisted

Pair Transceiver

• ANSI X3T12 TP-PMD compatible

•

IEEE 802.3u Auto-Negotiation for automatic speed

selection

• IEEE 802.3u compatible Media Independent Interface

(MII) with Serial Management Interface

• Integrated high performance 100 Mb/s clock recovery

circuitry requiring no external filters

• Full Duplex support for 10 and 100 Mb/s

•

MII Serial 10 Mb/s output mode

• Fully configurable node and repeater modes--allows

operation in either application

• Programmable loopback modes for easy system

diagnostics

• Flexible LED support

• IEEE 1149.1 Standard Test Access Port and Boundary-

Scan compatible

•

Small footprint 100-pin PQFP package

• Individualized scrambler seed for multi-PHY applications

DP83840A

10/100 Mb/s Ethernet Physical Layer

10 AND/OR 100 Mb/s

ETHERNET MAC OR

REPEATER/SWITCH

PORT

DP83840A

10/100 Mb/s

ETHERNET PHYSICAL LAYER

CLOCKS

STATUS

LEDS

DP83223

100BASE-TX

TRANSCEIVER

RJ-45

10BASE-T

100BASE-TX

MII

10BASE-T

100BASE-FX

TRANSCEIVER

DP83840AVCE Datasheet(PDF) 2 Page - Texas Instruments

DP83840AVCE Datasheet(HTML) 2 Page - Texas Instruments

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