DP83840AVCE datasheet(34/91 Pages) TI1

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3.0 Functional Description (Continued)

National Semiconductor

Version A

3.7.15 Typical Node Application

An example of the 10BASE-T interface is shown in Figure

17. The TXS+/- signals are used for STP and the TXU+/-

signals for UTP. Standard UTP applications do not require

connection of the TXS+/- outputs. The output resistor

values are chosen to match the transmit output impedance

to the impedance of the twisted pair cable.

The DP83840A 10BASE-T outputs require a 1:2 step-up

isolation

transformer

order

match

the

cable

impedance. The 10BASE-T inputs require a 1:1 isolation

transformer and appropriate line termination. Refer to

Figure 16.

3.8 IEEE 1149.1 CONTROLLER

The IEEE 1149.1 standard deﬁnes a test access port and

boundary-scan architecture for digital integrated circuits

and for the digital portions of mixed analog/digital

integrated circuits. Figure 18 depicts the IEEE 1149.1

architecture.

The standard provides a solution for testing assembled

printed circuit boards and other products based on highly

complex digital integrated circuits and high-density surface-

mounting assembly techniques. It also provides a means of

accessing and controlling design-for-test features built into

the digital integrated circuits. Such features include internal

scan paths and self-test functions as well as other features

intended to support service applications in the assembled

DP83840A

LED1

LED2

RXI-

RXI+

TXS-

TXS+

LED3

LED4

LED5

TXU+

TXU-

VCC

LOW CURRENT LEDS

1:2

10.5

Ω 1%

10.5

Ω 1%

16.5

Ω 1%

16.5

Ω 1%

0.01

µF

1:1

0.01

µF

TD-

TD+

RD-

RD+

10BASE-T

INTERFACE

RJ45

0.01

µF

49.9

Ω

49.9

Ω

Note: Resistors from TXS + / - outputs can

1.5K

Ω 5%

1.5K

Ω 5%

1.5K

Ω 5%

1.5K

Ω 5%

1.5K

Ω 5%

be added if STP cable support is required.

(For STP applications, the RXI+/- termination

resistors should each be 75

Ω +/-1%)

FIGURE 17. Typical 10BASE-T Node Application

DP83840AVCE Datasheet(PDF) 34 Page - Texas Instruments

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