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EM73C63 Datasheet(PDF) 16 Page - ELAN Microelectronics Corp |
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EM73C63 Datasheet(HTML) 16 Page - ELAN Microelectronics Corp |
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16 / 40 page ![]() 16 * This specification are subject to be changed without notice. 8.11.2000 EM73C63 4-BIT MICRO-CONTROLLER FOR LCD PRODUCT Preliminary P16 3 210 Initial value : 0000 * SPME SWWT SPME Enable STOP mode SWWT Set wake-up warm-up time 1 Enable STOP mode 0 0 218/CLK 0 no function 0 1 214/CLK 10 216/CLK 1 1 no function TIME BASE INTERRUPT (TBI ) The time base can be used to generate a single fixed frequency interrupt . Eight types of frequencies can be selected with the "P25" setting. P25 3 2 1 0 i nitial value : 0000 P25 DUAL operation mode SLOW operation mode 0 0 x x Interrupt disable Interrupt disable 0 1 0 0 Interrupt frequency LXIN / 23 Hz Reserved 0 1 0 1 Interrupt frequency LXIN / 24 Hz Reserved 0 1 1 0 Interrupt frequency LXIN / 25 Hz Reserved 0 1 1 1 Interrupt frequency LXIN / 214 Hz Interrupt frequency LXIN / 214 Hz 1 1 0 0 Interrupt frequency LXIN / 21 Hz Reserved 1 1 0 1 Interrupt frequency LXIN / 26 Hz Interrupt frequency LXIN / 26 Hz 1 1 1 0 Interrupt frequency LXIN / 28 Hz Interrupt frequency LXIN / 28 Hz 1 1 1 1 Interrupt frequency LXIN / 210 Hz Interrupt frequency LXIN / 210 Hz 1 0 x x Reserved Reserved TIMER / COUNTER ( TIMERA, TIMERB) Timer/counters support three special functions: 1. Even counter 2. Timer. 3. Pulse-width measurement. These three functions can be executed by 2 timer/counter independently. With timerA, the counter data is saved in timer register TAH, TAM, TAL. User can set counter initial value and read the counter value by instruction "LDATAH(M,L)" and "STATAH(M,L)". With timer B register is TBH, TBM, TBL and the W/R instruction are "LDATBH (M,L)" and "STATBH (M,L)". The basic structure of timer/counter is composed by two identical counter module , these two modules can be set initial timer or counter value to the timer registers, P28 and P29 are the command registers for timerA and timer B, user can choose different operation modes and internal clock rates by setting these two registers. When timer/counter overflows, it will generate a TRGA(B) interrupt request to interrupt control unit. |
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