EM73C63 datasheet(19/40 Pages) EMC

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* This specification are subject to be changed without notice.

EM73C63

4-BIT MICRO-CONTROLLER FOR LCD PRODUCT

Preliminary

8.11.2000

Under the pulse width measurement mode, the counter is incresed at the rising edge of internal pulse during

external timer/counter input (P8.1/TRGB, P8.3/TRGA ) in high level, interrupt request is generated as soon as

timer/counter count overflow.

Internal pulse

TimerB(TimerA) value

n+1

n+2

n+3

n+4

n+5

P8.1/TRGB(P8.3/TRGA)

PROGRAM EXAMPLE: Enable timerA by pulse width measurement mode .

LDIA #1100b;

OUTA P28; Enable timerA with pulse width measurement mode.

INTERRUPT FUNCTION

Five interrupt sources are available, 2 from external interrupt sources and 3 from internal interrupt sources

. Multiple interrupts are admitted according to their priority .

Type

Interrupt source

Priority

Interrupt

Program ROM

Latch

Enable condition

entry address

External External interrupt(INT0)

IL5

EI=1

002h

Internal

Reserved

IL4

EI=1, MASK3=1

004h

Internal

TimerA overflow interrupt (TRGA) 3

IL3

EI=1, MASK2=1

006h

Internal

TimerB overflow interrupt (TRGB) 4

IL2

EI=1, MASK1=1

008h

Internal

Time base interrupt(TBI)

IL1

00Ah

External External interrupt(INT1)

IL0

EI=1,MASK0=1

00Ch

INTERRUPT STRUCTURE

Interrupt controller:

IL0-IL5

: Interrupt latch . Hold all interrupt requests from all interrupt sources. IL's can not

be set by program, but can be reset by program or system reset, so IL can only

decide which interrupt source can be accepted.

MASK0-MASK3

: Except for INT0 ,MASK register may promit or inhibit all interrupt sources.

Reset by system reset and program

instruction

MASK0 MASK1 MASK1 MASK2 MASK3

IL0

INT1

IL1

TBI

IL2

IL3

TRGA

IL4

IL5

INT0

Priority checker

Entry address generator

Interrupt request

Interrupt entry address

Reset by system reset and program

instruction

Set by program instruction

TRGB

Reserved

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