B3-16

EM78P156E

Table 5 The status of T and P being affected by events

Event

T

P

Power-on

1

1

WDTC instruction

1

1

WDT time-out

0

*P

SLEP instruction

1

0

Wake-up on pin changed during SLEEP mode

1

0

Fig. 9 Block diagram of Reset of controller

VI.6 Interrupt

EM78P156E has three falling edge interrupts listed below :

(1) TCC overflow interrupt

(2) Port 6 input status changed interrupt

(3) External interrupt [(P60//INT) pin].

Before Port 6 input status changed interrupt being enabled, reading Port 6 (e.g. “MOV R6,R6”) is necessary.

Each pin of Port 6 can have this feature if its status changed. Any pin configured as output or P60 pin configured

as /INT is excluded from this function. The Port 6 input status changed interrupt can wake up the EM78P156E from the

sleep mode if it is enabled prior to going into the sleep mode by executing SLEP. When waking up, the controller will

continue to execute the succesive address if the global interrupt is disabled or branch to the interrupt vector 008H if the

global interrupt is enabled.

RF is the interrupt status register, which records the interrupt requests in the relative flags/bits. IOCF is an

interrupt mask register. The global interrupt is enabled by the ENI instruction and is disabled by the DISI

instruction. When one of the interrupts (when enabled) occurs, the next instruction will be fetched from address

DQ

CLK

CLR

CLK

RESET

18 ms

WDT

Oscillator

Power-on

Reset

WDTE

WDT Timeout

/RESET

M

U

X

Voltage

Detector

1

0

/Enable

CODE

Option

*P: Previous value before reset