FT122 datasheet(21/47 Pages) FTDI

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Document No.: FT_000647

FT122 ENHANCED USB DEVICE CONTROLLER WITH PARALLEL

BUS

IC Datasheet Version 1.1

Clearance No.: FTDI#

313

Bit

Symbol

Reset

Description

5-4

Reserved

0b’00

Reserved, write to 0

SET_TO_ONE

This bit must be set to 1

SOF-only Interrupt

Mode

0: normal operation

1: interrupt will generate on receiving SOF packet only,

regardless the value of the Interrupt Pin Mode bit in DMA

configuration register.

Table 6-6 Clock Division Factor Register (Byte 2)

6.2.4 Set DMA

Command

: FBh

Data

: Read/Write 1 byte; Read/Write 2 bytes (for Enhanced Mode)

Bit

Symbol

Reset

Description

1-0

DMA Burst

0b’00

Set the DMA burst size

00: Single cycle mode

01: 4 cycle burst mode

10: 8 cycle burst mode

11: 16 cycle burst mode

DMA Enable

Enable DMA operation

0: DMA operation is disabled

1: DMA operation is enabled

FT122 will clear this bit upon EOT_n assertion.

DMA Direction

This bit indicates the DMA read or write operation.

0: DMA read. Data read from FT122 OUT buffer to

system memory.

1: DMA write. Data write to FT122 IN buffer from system

memory.

Auto Reload

Automatically restart the DMA operation.

0: DMA needs to restart by software

1: DMA will restart automatically after the previous DMA

transfer finishes

Interrupt Pin Mode

0: normal operation. Interrupt will generate if any of the

bit in the interrupt register is set.

1: interrupt will generate upon receiving SOF packet or if

any of the bit in the interrupt register is set.

EPI4 Interrupt Enable

Interrupt Enable for endpoint index 4. During DMA

operation, EPI4 interrupt should be turned off to avoid

un-necessary interrupt service.

For enhanced mode this bit has no function. EPI4

interrupt is always enabled unless it is selected as a DMA

FT122 Datasheet(PDF) 21 Page - Future Technology Devices International Ltd.

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