RFM219SW

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Interrupts

Descriptions

Clearing Methods

RX_TMO

The receive timer timeout interrupt

By External MCU

FIFO_NMTY

The FIFO not-empty interrupt

Auto

FIFO_TH

The FIFO threshold-reach interrupt

Auto

FIFO_FULL

The FIFO full interrupt

Auto

FIFO_WBYTE

The FIFO write-byte interrupt

Auto

FIFO_OVF

The FIFO overflow interrupt

Auto

RSSI_INDI

The real-time RSSI indication interrupt

Auto

All the interrupts are active-high. The figure below gives an example of how the multiple interrupts sources are multiplexed to the

INT1, and then assigned to the GPOs in the packet mode. The INT2 has the similar mapping but is selected by INT2_CTL<3:0>.

RSSI_VLD_CLR

RSSI_VLD_EN

RSSI

Interrupt Source

0

0

RSSI_VLD_FLG

D Q

1

PREAM_PS_CLR

PREAM_PS_EN

Preamble

Interrupt Source

0

0

PREAM_PS_FLG

D Q

1

SYNC_PS_CLR

SYNC_PS_EN

Sycn Word

Interrupt Source

0

0

SYNC_PS_FLG

D Q

1

INT1_CTL <3:0>

Node ID

NODE_PS_CLR

NODE_PS_EN

0

(default)

0000

GPO4_SEL <1:0>

Interrupt Source

0

CRC Interrupt

Source

0

0

NODE_PS_FLG

D Q

1

CRC_PS_CLR

CRC_PS_EN

0

CRC_PS_FLG

D Q

1

0001

0010

0011

0100

0101

0110

GPO4

GPO3_SEL <1:0>

GPO3

Packet Done

PKT_DONE_CLR

PKT_DONE_EN

0111

INT1

GPO2_SEL <1:0>

Interrupt Source

0

0

PKT_DONE_FLG

D Q

1

1000

1001

GPO2

Sleep Timeout

SL_TMO_CLR

SL_TMO_EN

1010

1011

Interrupt Source

0

0

SL_TMO_FLG

D Q

1

1100

1101

GPO1_SEL <1:0>

GPO1

Receive Timeout

Interrupt Source

0

RX_TMO_CLR

RX_TMO_EN

0

RX_TMO_FLG

D Q

1

1110

0

1111

FIFO_NMTY_FLG

FIFO_TH_FLG

FIFO_FULL_FLG

FIFO_WBYTE_FLG

FIFO_OVF_FLG

RSSI_INDI_FLAG

Figure 19. INT1 Multiplexing and Controls