KAI-4021 Image Sensor

www.truesenseimaging.com

Revision 1.1 PS-0014 Pg 5

TABLE OF FIGURES

Figure 1: Block Diagram ................................................................................................................................................................................8

Figure 2: Pixel Architecture..........................................................................................................................................................................9

Figure 3: Vertical to Horizontal Transfer Architecture .......................................................................................................................10

Figure 4: Horizontal Register to Floating Diffusion Architecture ....................................................................................................11

Figure 5: Horizontal Register.....................................................................................................................................................................12

Figure 6: Output Architecture ...................................................................................................................................................................13

Figure 7: ESD Protection.............................................................................................................................................................................15

Figure 8: Package Pin Designations - Top View.....................................................................................................................................16

Figure 9: Monochrome with Microlens Quantum Efficiency..............................................................................................................19

Figure 10: Monochrome without Microlens Quantum Efficiency.....................................................................................................19

Figure 11: Color Quantum Efficiency.......................................................................................................................................................20

Figure 12: Monochrome with Microlens Angular Quantum Efficiency ...........................................................................................21

Figure 13: Dark Current versus Temperature ........................................................................................................................................21

Figure 14: Power ...........................................................................................................................................................................................22

Figure 15: Frame Rates................................................................................................................................................................................22

Figure 16: Overclock Regions of Interest ...............................................................................................................................................24

Figure 17: Output Amplifier.......................................................................................................................................................................28

Figure 18: Clock Line Capacitances ..........................................................................................................................................................29

Figure 19: Progressive Scan Operation ...................................................................................................................................................31

Figure 20: Progressive Scan Flow Chart ..................................................................................................................................................31

Figure 21: Summed Interlaced Scan Operation.....................................................................................................................................32

Figure 22: Summed Interlaced Scan Flow Chart ...................................................................................................................................32

Figure 23: Non- Summed Interlaced Scan Operation ..........................................................................................................................33

Figure 24: Non- Summed Interlaced Scan Flow Chart .........................................................................................................................33

Figure 25: Framing Timing without Binning...........................................................................................................................................34

Figure 26: Frame Timing for Vertical Binning by 2 ...............................................................................................................................34

Figure 27: Non-Summed Interlaced Scan Even Frame Timing...........................................................................................................35

Figure 28: Non-Summed Interlaced Scan Odd Frame Timing............................................................................................................36

Figure 29: Summed Interlaced Scan Even Frame Timing ....................................................................................................................37

Figure 30: Summed Interlaced Scan Odd Frame Timing .....................................................................................................................38

Figure 31: Frame Timing Edge Alignment ..............................................................................................................................................39

Figure 32: Line Timing Single Output ......................................................................................................................................................40

Figure 33: Line Timing Dual Output .........................................................................................................................................................40

Figure 34: Line Timing Vertical Binning by 2..........................................................................................................................................41

Figure 35: Line Timing Detail .....................................................................................................................................................................42

Figure 36: Line Timing by 2 Detail ............................................................................................................................................................42

Figure 37: Line Timing Interlaced Modes................................................................................................................................................43

Figure 38: Line Timing Edge Alignment ..................................................................................................................................................44

Figure 39: Pixel Timing ................................................................................................................................................................................45

Figure 40: Pixel Timing Detail ....................................................................................................................................................................45

Figure 41: Fast Line Dump Timing ............................................................................................................................................................46

Figure 42: Electronic Shutter Line Timing ..............................................................................................................................................47

Figure 43: Integration Time Definition....................................................................................................................................................47

Figure 44: Completed Assembly ...............................................................................................................................................................51

Figure 45: Die to Package Alignment ......................................................................................................................................................52

Figure 46: Glass Drawing.............................................................................................................................................................................53

Figure 47: Glass Transmission....................................................................................................................................................................54