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KAI-4021 Datasheet(PDF) 29 Page - ON Semiconductor |
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KAI-4021 Datasheet(HTML) 29 Page - ON Semiconductor |
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29 / 56 page ![]() KAI-4021 Image Sensor www.truesenseimaging.com Revision 1.1 PS-0014 Pg 29 AC OPERATING CONDITIONS Clock Levels Description Symbol Minimum Nominal Maximum Units Notes Vertical CCD Clock High V2H 8.5 9.0 9.5 V Vertical CCD Clocks Midlevel V1M, V2M -0.5 0.0 0.2 V Vertical CCD Clocks Low V1L, V2L -9.5 -9.0 -8.5 V Horizontal CCD Clocks High H1H, H2H 0.0 0.5 1.0 V Horizontal CCD Clocks Low H1L, H2L -5.0 -4.5 -4.0 V Reset Clock Amplitude RH 5.0 V 1 Reset Clock Low RL -3.5 -3.0 -2.5 V Electronic Shutter Voltage Vshutter 44 48 52 V 2 Fast Dump High FDH 4 5 5 V Fast Dump Low FDL -9.5 -9 -8 V Notes: 1. Reset amplitude must be set to 7.0 V for 40,000 – 80,000 electrons output in summed interlaced or binning modes. 2. Refer to Application Note Using Interline CCD Image Sensors in High Intensity Visible Lighting Conditions. Clock Line Capacitances Figure 18: Clock Line Capacitances V1E V1O V2O V2E GND 20nF 20nF 20nF 20nF 5nF 5nF 5nF 5nF H1SL+H1BL 50pF H2SL+H2BL 50pF H1SR+H1BR 50pF H2SR+H2BR 50pF 25pF 25pF GND GND Reset 10pF GND SUB 4nF GND FD 40pF |
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