MT9079AC datasheet(30/54 Pages) MITEL

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MT9079

4-266

Bit

Name

Functional Description

7EBI

(0)

Receive

E-bit

Interrupt.

When

unmasked an interrupt is initiated

when a receive E-bit

indicates a

remote CRC-4 error. 1 - unmasked, 0

masked.

Interrupt

vector

00100000.

CRCI

(0)

CRC-4

Error

Interrupt.

When

unmasked an interrupt is initiated

when a local CRC-4 error occurs. 1 -

unmasked, 0 - masked. Interrupt vec-

tor = 00100000.

CEFI

(0)

Consecutively Errored FASs Inter-

rupt. When unmasked an interrupt is

initiated

when

two

consecutive

errored frame alignment signals are

received. 1 - unmasked, 0 - masked.

Interrupt vector = 00100000.

BPVI

(0)

Bipolar

Violation

Interrupt.

When

unmasked an interrupt is initiated

when a bipolar violation error occurs.

1 - unmasked, 0 - masked. Interrupt

vector = 00100000.

RCRI

(0)

RAI and Continuous CRC Error Inter-

rupt. When unmasked an interrupt is

initiated when the RAI and continu-

ous CRC error counter is incre-

mented. 1 - unmasked, 0 - masked.

Interrupt vector = 00100000.

BERI

(0)

Bit Error Interrupt. When unmasked

an interrupt is initiated when a bit

error occurs. 1 - unmasked, 0 -

masked.

Interrupt

vector

00100000.

---

Unused.

SIGI

(0)

Signalling (CAS)

Interrupt.

When

unmasked and any of the receive

ABCD bits of any channel changes

state an interrupt is initiated. 1 -

unmasked, 0 - masked. Interrupt vec-

tor = 00000001

Table 37 - Interrupt Mask Word One

(Page 1, Address 1CH)

Bit

Name

Functional Description

7EBO

(0)

Receive

E-bit

Counter

Overflow

Interrupt. When unmasked an inter-

rupt is initiated when the E-bit error

counter changes form FFH to 0H. 1 -

unmasked, 0 - masked. Interrupt vec-

tor = 00010000.

6CRCO

(0)

CRC-4 Error Counter Overflow Inter-

rupt. When unmasked an interrupt is

initiated

when

the

CRC-4

error

counter changes form FFH to 0H. 1 -

unmasked, 0 - masked. Interrupt vec-

tor = 00010000.

CALNI

(0)

CRC-4 Alignment Interrupt. When

unmasked an interrupt is initiated

when the CALN status bit of page 3,

address 12H changes state. 1 -

unmasked, 0 - masked. Interrupt vec-

tor = 00001000.

4FERO

(0)

Frame

Alignment

Signal

Error

Counter Overflow Interrupt. When

unmasked an interrupt is initiated

when the frame alignment signal

error counter changes form FFH to

0H. 1 - unmasked, 0 - masked. Inter-

rupt vector = 00010000.

3RCRO

(0)

RAI and Continuous CRC-4 Error

Counter Overflow Interrupt. When

unmasked an interrupt is initiated

when the RAI and Continuous error

counter changes form FFH to 0H. 1 -

unmasked, 0 - masked. Interrupt vec-

tor = 00010000.

BERO

(0)

Bit Error Counter Overflow Interrupt.

When unmasked an interrupt is initi-

ated when the bit error counter

changes

form

FFH

0H.

unmasked, 0 - masked. Interrupt vec-

tor = 00010000.

AUXPI

(0)

Auxiliary

Pattern

Interrupt.

When

unmasked an interrupt is initiated

when the AUXP status bit of page 3,

address

15H

goes

high.

unmasked, 0 - masked. Interrupt vec-

tor = 01000000.

---

Unused.

Table 38 - Interrupt Mask Word Two

(Page 1, Address 1DH)

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