MT9079AC datasheet(46/54 Pages) MITEL

46 / 54 page

MT9079

4-282

Notes:

1. High impedance is measured by pulling to the appropriate rail with RL. Timing is corrected to cancel time taken to discharge CL.

2. Outputs are compatible with both CMOS and TTL logic levels.

Timing parameters are measured with respect to both CMOS

(VCT=0.5VDD) and TTL (VTT=1.5V) references and the worst case value is specified.

3. DS and CS may be connected together.

4. tDAZ is measured with respect to the raising edge of DS or CS, whichever occurs first.

Figure 17 - Microprocessor Timing Diagram

AC Electrical Characteristics- Microprocessor Timing

Characteristics

Sym

Min

Typ

Max

Units

Conditions/Notes

1DS low

tDSL

2DS High

tDSH

3CS Setup

tCSS

See Note 3

4R/W Setup

tRWS

5ns

Address Setup

tADS

5ns

6CS Hold

tCSH

See Note 3

7R/W Hold

tRWH

0ns

Address Hold

tADH

0ns

Data Delay Read

tDDR

120

CL=150pF, RL=1kΩ

See Note 2

Data Active to High Z Delay

tDAZ

CL=150pF, RL=1kΩ

See Notes 1, 2 & 4

Data Setup Write

tDSW

5ns

Data Hold Write

tDHW

R/W

A0-A4

D0-D7

READ

D0-D7

WRITE

tCSS

tRWS

tADS

tCSH

tRWH

tADH

tDSW

tDAZ

tDDR

tDHW

tDSH

tDSL

VALID DATA

VTT

VTT,VCT

VTT

MT9079AC Datasheet(PDF) 46 Page - Mitel Networks Corporation

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