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DS2143 Datasheet(PDF) 16 Page - Dallas Semiconductor |
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DS2143 Datasheet(HTML) 16 Page - Dallas Semiconductor |
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16 / 44 page ![]() DS2143/DS2143Q 16 of 44 SSR: SYNCHRONIZER STATUS REGISTER (Address=1E Hex) (MSB) (LSB) CSC5 CSC4 CSC3 CSC2 CSC0 FASSA CASSA CRC4SA SYMBOL POSITION NAME AND DESCRIPTION CSC5 SSR.7 CRC4 Sync Counter Bit 5. MSB of the 6-bit counter. CSC4 SSR.6 CRC4 Sync Counter Bit 4. CSC3 SSR.5 CRC4 Sync Counter Bit 3. CSC2 SSR.4 CRC4 Sync Counter Bit 2. CSC1 SSR.3 CRC4 Sync Counter Bit 0. LSB of the 6-bit counter. The next to LSB is not accessible. FASSA SSR.2 FAS Sync Active. Set while the synchronizer is searching for alignment at the FAS level. CASSA SSR.1 CAS MF Sync Active. Set while the synchronizer is searching for the CAS MF alignment word. CRC4SA SSR.0 CRC4 MF Sync Active. Set while the synchronizer is searching for the CRC4 MF alignment word. CRC4 SYNC COUNTER The CRC4 Sync Counter increments each time the 8ms CRC4 multiframe search times out. The counter is cleared when the DS2143 has successfully obtained synchronization at the CRC4 level. The counter can also be cleared by disabling the CRC4 mode (CCR.0=0). This counter is useful for determining the amount of time the DS2143 has been searching for synchronization at the CRC4 level. Annex B of CCITT G.706 suggests that if synchronization at the CRC4 level cannot be obtained within 400 ms, then the search should be abandoned and proper action taken. The CRC4 Sync Counter will rollover |
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