DS2143 datasheet(25/44 Pages) DALLAS

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DS2143/DS2143Q

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TS1 TO TS16: TRANSMIT SIGNALING REGISTERS (Address=40 to 4F Hex)

(MSB)

(LSB)

0000

TS1 (40)

A(1)

B(1)

C(1)

D(1)

A(16)

B(16)

C(16)

D(16)

TS2 (41)

A(2)

B(2)

C(2)

D(2)

A(17)

B(17)

C(17)

D(17)

TS3(42)

A(3)

B(3)

C(3)

D(3)

A(18)

B(18)

C(18)

D(18)

TS4 (43)

A(4)

B(4)

C(4)

D(4)

A(19)

B(19)

C(19)

D(19)

TS5 (44)

A(5)

B(5)

C(5)

D(5)

A(20)

B(20)

C(20)

D(20)

TS6 (45)

A(6)

B(6)

C(6)

D(6)

A(21)

B(21)

C(21)

D(21)

TS7 (46)

A(7)

B(7)

C(7)

D(7)

A(22)

B(22)

C(22)

D(22)

TS8 (47)

A(8)

B(8)

C(8)

D(8)

A(23)

B(23)

C(23)

D(23)

TS9 (48)

A(9)

B(9)

C(9)

D(9)

A(24)

B(24)

C(24)

D(24)

TS10 (49)

A(10)

B(10)

C(10)

D(10)

A(25)

B(25)

C(25)

D(25)

TS11 (4A)

A(11)

B(11)

C(11)

D(11)

A(26)

B(26)

C(26)

D(26)

TS12 (4B)

A(12)

B(12)

C(12)

D(12)

A(27)

B(27)

C(27)

D(27)

TS13(4C)

A(13)

B(13)

C(13)

D(13)

A(28)

B(28)

C(28)

D(28)

TS14 (4D)

A(14)

B(14)

C(14)

D(14)

A(29)

B(29)

C(29)

D(29)

TS15 (4E)

A(15)

B(15)

C(15)

D(15)

A(30)

B(30)

C(30)

D(30)

TS16 (4F)

SYMBOL

POSITION

NAME AND DESCRIPTION

TS1.0/1/3

Spare Bits.

TS1.2

Remote Alarm Bit.

A(1)

TS2.7

Signaling Bit A for Channel 1.

D(30)

TS16.0

Signaling Bit D for Channel 30.

Each Transmit Signaling Register (TS1 to TS16) contains the CAS bits for two timeslots that will be

inserted into the outgoing stream if enabled to do so via TCR1.5. On multiframe boundaries, the DS2143

will load the values present in the Transmit Signaling Register into an outgoing signaling shift register

that is internal to the device. The user can utilize the Transmit Multiframe bit in Status Register 2 (SR2.5)

to know when to update the signaling bits. The bit will be set every 2 ms and the user has 2 ms to update

the TSRs before the old data will be retransmitted.

The TS1 register is special because it contains the CAS multiframe alignment word in its upper nibble.

The upper 4 bits must always be set to 0000 or else the terminal at the far end will lose multiframe

synchronization. If the user wishes to transmit a multiframe alarm to the far end, then the TS1.2 bit

should be set to a 1. If no alarm is to be transmitted, then the TS1.2 bit should be cleared. The three

remaining bits in TS1 are the spare bits. If they are not used, they should be set to 1. In CCS signaling

mode, TS1 to TS16 can also be used to insert signaling information. Via the SR2.5 bit, the user will be

informed when the signaling registers need to be loaded with data. The user has 2 ms to load the data

before the old data will be retransmitted.

8.0 TRANSMIT IDLE REGISTERS

There is a set of five registers in the DS2143 that can be used to custom tailor the data that is to be

transmitted onto the E1 line, on a channel by channel basis. Each of the 32 E1 channels can be forced to

have a user defined idle code inserted into them.

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