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WM8993 Datasheet(PDF) 114 Page - Wolfson Microelectronics plc |
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WM8993 Datasheet(HTML) 114 Page - Wolfson Microelectronics plc |
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114 / 229 page ![]() WM8993 Production Data w PD, November 2010, Rev 4.0 114 Figure 49 DSP Mode Audio Interface (mode A, AIF_LRCLK_INV=0, Slave) Figure 50 DSP Mode Audio Interface (mode B, AIF_LRCLK_INV=1, Slave) PCM operation is supported in DSP interface mode. WM8993 ADC data that is output on the Left Channel will be read as mono PCM data by the receiving equipment. Mono PCM data received by the WM8993 will be treated as Left Channel data. This data may be routed to the Left/Right DACs as described in the “Digital Mixing” section. AUDIO DATA FORMATS (TDM MODE) TDM is supported in master and slave mode and is enabled by register bits AIF_ADC_TDM and AIF_DAC_TDM. All audio interface data formats support time division multiplexing (TDM) for ADC and DAC data. Two time slots are available (Slot 0 and Slot 1), selected by register bits AIFADC_TDM_CHAN and AIFDAC_TDM_CHAN which control time slots for the ADC data and the DAC data. When TDM is enabled, the ADCDAT pin will be tri-stated immediately before and immediately after data transmission, to allow another ADC device to drive this signal line for the remainder of the sample period. Note that it is important that two ADC devices do not attempt to drive the data pin simultaneously. A short circuit may occur if the transmission time of the two ADC devices overlap with each other. See “Audio Data Formats (TDM Mode)” for details of the ADCDAT output relative to BCLK signal. Note that it is possible to ensure a gap exists between transmissions by setting the transmitted word length to a value higher than the actual length of the data. For example, if 32-bit word length is selected where only 24-bit data is available, then the WM8993 interface will tri-state after transmission of the 24-bit data, ensuring a gap after the WM8993’s TDM slot. When TDM is enabled, BCLK frequency must be high enough to allow data from both time slots to be transferred. The relative timing of Slot 0 and Slot 1 depends upon the selected data format as shown in Figure 51 to Figure 55. |
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