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Output Overload Protection

TPS55383

,, TPS55386

www.ti.com ......................................................................................................................................................................................... SLUS818 – SEPTEMBER 2008

SW Node Snubber

Voltage ringing at the SW node is caused by fast switching edges and parasitic inductance and capacitance. If

the ringing results in excessive voltage on the SW node, or erratic operation of the converter, an R-C snubber

may be used to dampen the ringing and ensure proper operation over the full load range.

DESIGN HINT

A series-connected R-C snubber (C = between 330 pF and 1 nF, R = 10

Ω)

connected from SW to GND reduces the ringing on the SW node.

Bootstrap Resistor

A small resistor in series with the bootstrap capacitor reduces the turn-on time of the internal MOSFET, thereby

reducing the rising edge ringing of the SW node.

DESIGN HINT

A resistor with a value between 1

Ω and 3 Ω may be placed in series with the

bootstrap capacitor to reduce ringing on the SW node.

DESIGN HINT

Placeholders for these components should be placed on the initial prototype PCBs in

case they are needed.

In the event of an overcurrent during soft-start on either output (such as starting into an output short),

pulse-by-pulse current limiting and PWM frequency division are in effect for that output until the internal soft-start

timer ends. At the end of the soft-start time, a UV fault is declared. During this fault, both PWM outputs are

disabled and the small pulldown MOSFETs (from SWx to GND) are turned ON. This process ensures that both

outputs discharge to GND in the event that overcurrent is on one output while the other is not loaded. The

converter then enters a hiccup mode timeout before attempting to restart. Frequency Division describes a

condition when an overcurrent pulse is detected and six clock cycles are skipped before a next PWM pulse is

initiated, effectively dividing the operating frequency by six and preventing excessive current build up in the

inductor.

In the event of an overcurrent condition on either output after the output reaches regulation, pulse-by-pulse

current limit is in effect for that output. In addition, an output undervoltage (UV) comparator monitors the FBx

voltage (that follows the output voltage) to declare a fault if the output drops below 85% of regulation. During this

fault condition, both PWM outputs are disabled and the small pulldown MOSFETs (from SWx to GND) are turned

ON. This design ensures that both outputs discharge to GND, in the event that overcurrent is on one output while

the other is not loaded. The converter then enters a hiccup mode timeout before attempting to restart.

The overcurrent threshold for Output 1 is set nominally at 4.5 A. The overcurrent level of Output 2 is determined

by the state of the ILIM2 pin. The ILIM setting of Output 2 is not latched in place and may be changed during

operation of the converter.

Table 2. Current Limit Threshold Adjustment for

Output 2

ILIM2 Connection

OCP Threshold for Output 2

4.5 A nominal setting

(floating)

3.0 A nominal setting

GND

1.5 A nominal setting

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