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SLMA002 Datasheet(PDF) 15 Page - Texas Instruments

Part # SLMA002
Description  3-A DUAL NON-SYNCHRONOUS CONVERTER WITH INTEGRATED HIGH-SIDE MOSFET AND EXTERNAL COMPENSATION
PDF  46 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

SLMA002 Datasheet(HTML) 15 Page - Texas Instruments

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5-V VOUT1
(2 V/div)
3.3-V VOUT2
(2 V/div)
T - Time - 1 ms/div
SEQ = BP
Sequential
CH2 then CH1
T - Time - 1 ms/div
SEQ = GND
Sequential
CH1 then CH2
5-V VOUT1
(2 V/div)
3.3-V VOUT2
(2 V/div)
TPS55383
,, TPS55386
www.ti.com ......................................................................................................................................................................................... SLUS818 – SEPTEMBER 2008
Table 1. Sequence States
SEQ PIN STATE
MODE
EN1
EN2
Ignored by the device.when VEN2 <
enable threshold voltage
Tie EN1 to < enable threshold voltage
for BP to be active when VEN2 >
BP
Sequential, Output 2 then Output 1
Active
enable threshold voltage
Tie EN1 to > enable threshold voltage
for low quiescent current (BP inactive)
when VEN2 > enable threshold voltage
Ignored by the device.when VEN1 <
enable threshold voltage
Tie EN2 to < enable threshold voltage
for BP to be active when VEN1 >
GND
Sequential, Output 1 then Output 2
Active
enable threshold voltage
Tie EN2 to > enable threshold voltage
for low quiescent current (BP inactive)
when VEN1 > enable threshold voltage
Independent or Ratiometric, Output 1
Active. EN1 and EN2 must be tied
Active. EN1 and EN2 must be tied
(floating)
and Output 2
together for Ratio-metric startup.
together for Ratio-metric startup.
If the SEQ pin is connected to BP, then when Output 2 is enabled, Output 1 is allowed to start approximately 400
µs after Output 2 has reached regulation; that is, sequential startup where Output 1 is slave to Output 2. If EN2 is
allowed to go high after the outputs have been operating, then both outputs are disabled immediately, and the
output voltages decay according to the load that is present.
If the SEQ pin is connected to GND, then when Output 1 is enabled, Output 2 is allowed to start approximately
400
µs after Output 1 has reached regulation; that is, sequential startup where Output 2 is slave to Output 1. If
EN1 is allowed to go high after the outputs have been operating, then both outputs are disabled immediately,
and the output voltages decay according to the load that is present.
Figure 18. SEQ Pin TIed to BP
Figure 19. SEQ Pin Tied to GND
NOTE:
An R-C network connected to the ENx pin may be used in addition to the SEQ pin in
sequential mode to delay the startup of the first output voltage. This approach may be
necessary in systems with a large number of output voltages and elaborate voltage
sequencing requirements. See Enable and Timed Turn On of the Outputs.
Copyright © 2008, Texas Instruments Incorporated
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Product Folder Link(s): TPS55383 TPS55386



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