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PC87591L Datasheet(PDF) 431 Page - National Semiconductor (TI) |
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PC87591L Datasheet(HTML) 431 Page - National Semiconductor (TI) |
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431 / 437 page ![]() Software for Hardware Interface (Continued) Revision 1.07 431 www.national.com A.4 HOST DOMAIN REGISTER LAYOUT Host Configuration Registers A.4.1 SuperI/O Configuration (Section 6.1.8 on page 343) A.4.2 Shared Memory Configuration (Section 6.1.11 on page 349) A.4.3 RTC Configuration (Section 6.1.12 on page 353) Host Runtime Registers A.4.4 Shared Memory Host (Section 5.3.8 on page 303) 7 6 5 43210 SID Family ID SIOCF1 Reserved Number of DMA Wait States Number of I/O Wait States Software Reset SuperI/O Devices Enable SIOCF5 Reserved SMI to IRQ2 Enable Reserved SIOCF6 SCIOF6 Soft- ware Lock General-Purpose Scratch RTC Disabled Reserved SRID Chip Revision ID SIOCF8 Reserved LPC Bus Master Num. Reserved SIOCF9 Reserved Module Enable Status Valid Multi- plier Clock Status Clock Enable SuperI/O Clock Domain Source SIOCFD Reserved Power Supply Off Power But- ton Mode 7 6 5 43210 Shared Memory Configuration BIOS FWH ID BIOS FWH Enable User-De- fined Mem- ory Space Enable BIOS Ex- tended Space En- able BIOS LPC Enable Shared Memory Base Address High Byte User-Defined Memory Zone Address High Shared Memory Base Address Low Byte User-Defined Memory Zone Address Low Shared Memory Size Configuration Reserved User-Defined Memory Zone Size 7 6 5 43210 RLR Block Standard RAM Block RAM Write Block Extended RAM Write Block Extended RAM Read Block Extended RAM Reserved DOMAO Reserved Date of Month Alarm Register Offset Value MONAO Reserved Month Alarm Register Offset Value CENO Reserved Century Register Offset Value 7 6 5 43210 SMIMA0 Indirect Memory Address (7-0) SMIMA1 Indirect Memory Address (15-8) SMIMA2 Indirect Memory Address (23-16) |
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